On 10/27/23 09:56, Christophe Lyon wrote:
Hi Vladimir,
On Thu, 26 Oct 2023 at 16:00, Vladimir Makarov <vmakarov....@gmail.com> wrote:
This is the second attempt to improve RA cost calculation for pseudos
with equivalences. The patch explanation is in the log message.
The patch was successfully bootstrapped and tested on x86-64, aarch64,
and ppc64le. The patch was also benchmarked on x86-64 spec2017.
specfp2017 performance did not changed, specint2017 improved by 0.3%.
As reported by our CI, this patch causes a regression on arm:
FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3
For this testcase, we used to generate:
str lr, [sp, #-4]!
sub sp, sp, #12
add r0, sp, #4
bl bar
add r0, sp, #4
bl bar
add r0, sp, #4
bl bar
add sp, sp, #12
ldr lr, [sp], #4
bx lr
After your patch, we generate:
push {r4, lr}
sub sp, sp, #8
add r4, sp, #4
mov r0, r4
bl bar
mov r0, r4
bl bar
mov r0, r4
bl bar
add sp, sp, #8
pop {r4, lr}
bx lr
which uses 1 more register and 1 more instruction.
Shall I file a bugzilla report for this?
I started to work on this right after I got the message (yesterday). I
already have a patch and am going to commit it during an hour. So there
is no need to fill the PR.
