On 10/27/23 14:31, Patrick O'Neill wrote:
Hi Fei,
A recent change to GCC [1] updated the the registers in the cm.push and
cm.pop insns for these testcases:
|FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies test1
FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies
test2_step1_0_size FAIL: gcc.target/riscv/rv32i_zcmp.c -Os
check-function-bodies test3|
Debug log:
Executing on host:
/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-linux-stage2/gcc/xgcc
-B/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-linux-stage2/gcc/
/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
-march=rv64gcv -mabi=lp64d -mcmodel=medlow -fdiagnostics-plain-output
-Os -Os -march=rv32imaf_zca_zcmp -mabi=ilp32f -mcmodel=medlow -S -o
rv32i_zcmp.s (timeout = 600)
spawn -ignore SIGHUP
/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-linux-stage2/gcc/xgcc
-B/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-linux-stage2/gcc/
/github/patrick-postcommit-runner-1/_work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
-march=rv64gcv -mabi=lp64d -mcmodel=medlow -fdiagnostics-plain-output -Os -Os
-march=rv32imaf_zca_zcmp -mabi=ilp32f -mcmodel=medlow -S -o rv32i_zcmp.s
PASS: gcc.target/riscv/rv32i_zcmp.c -Os (test for excess errors)
body: .*\tcm.push {ra, s0-s4}, -80
.*\tcm.popret {ra, s0-s4}, 80
.*
against: lui a5,%hi(.LC0)
li t0,-16384
cm.push {ra, s0-s6}, -80
addi t0,t0,816
fsw fs0,44(sp)
lw s2,%lo(.LC0)(a5)
lw s3,%lo(.LC0+4)(a5)
fmv.s.x fs0,zero
li a5,4096
add sp,sp,t0
addi a5,a5,-784
li s1,4096
li s0,0
addi s5,sp,-784
add s4,sp,a5
addi s1,s1,-976
call my_getchar
add s6,s5,s0
sb a0,784(s6)
call my_getchar
call __floatsidf
mv a2,s2
mv a3,s3
call __muldf3
call __truncdfsf2
slli a5,s0,2
add a5,s4,a5
fsw fa0,-192(a5)
addi s0,s0,1
lbu a4,784(s6)
fcvt.s.w fa5,a4
flw fa4,-192(a5)
fadd.s fa5,fa5,fa4
fadd.s fs0,fs0,fa5
bne s0,s1,.L2
li t0,16384
addi t0,t0,-816
add sp,sp,t0
fcvt.w.s a0,fs0,rtz
flw fs0,44(sp)
cm.popret {ra, s0-s6}, 80
FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies test1
Would it be OK if we made the regex accept any s[0-9] register (or
would it be better if it was [1-9])?
Proposed change:
I'd think your proposed change would be fine.
[1] It was one of these commits:
https://github.com/gcc-mirror/gcc/compare/a4ca8691333344cecc595d1af8b21e51f588e2f2...4d49685d671e4e604b2b873ada65aaac89348794
Almost certainly the regsiter allocator change.
Jeff
