Hi Jeff,
> On 2/26/24 17:17, Greg McGary wrote:
>> The sign-bit-copies of a sign-extending load cannot be known until runtime on
>> WORD_REGISTER_OPERATIONS targets, except in the case of a zero-extending MEM
>> load. See the fix for PR112758.
>> 2024-02-22 Greg McGary <g...@rivosinc.com>
>> PR rtl-optimization/113010
>> * combine.cc (simplify_comparison): Simplify a SUBREG on
>> WORD_REGISTER_OPERATIONS targets only if it is a zero-extending
>> MEM load.
>> * gcc.c-torture/execute/pr113010.c: New test.
> I think this is fine for the trunk. I'll do some final testing on it
> tomorrow.
unfortunately, the patch broke Solaris/SPARC bootstrap
(sparc-sun-solaris2.11):
/vol/gcc/src/hg/master/local/gcc/combine.cc: In function 'rtx_code
simplify_comparison(rtx_code, rtx_def**, rtx_def**)':
/vol/gcc/src/hg/master/local/gcc/combine.cc:12101:25: error: '*(unsigned
int*)((char*)&inner_mode + offsetof(scalar_int_mode, scalar_int_mode::m_mode))'
may be used uninitialized [-Werror=maybe-uninitialized]
12101 | scalar_int_mode mode, inner_mode, tmode;
| ^~~~~~~~~~
Rainer
--
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Rainer Orth, Center for Biotechnology, Bielefeld University
