Support the Smrnmi extension, which provides new CSRs
for Machine mode Non-Maskable Interrupts.
gcc/ChangeLog:
* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-smrnmi.c: New test.
Signed-off-by: Jiawei <[email protected]>
---
gcc/config/riscv/riscv-ext.def | 13 +++++++++++++
gcc/config/riscv/riscv-ext.opt | 2 ++
gcc/doc/riscv-ext.texi | 4 ++++
gcc/testsuite/gcc.target/riscv/arch-smrnmi.c | 5 +++++
4 files changed, 24 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 6c122c3987b..98e7b82c8d1 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1753,6 +1753,19 @@ DEFINE_RISCV_EXT(
/* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
/* EXTRA_EXTENSION_FLAGS */ 0)
+DEFINE_RISCV_EXT(
+ /* NAME */ smrnmi,
+ /* UPPERCASE_NAME */ SMRNMI,
+ /* FULL_NAME */ "Resumable non-maskable interrupts",
+ /* DESC */ "",
+ /* URL */ ,
+ /* DEP_EXTS */ ({"zicsr"}),
+ /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+ /* FLAG_GROUP */ sm,
+ /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+ /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+ /* EXTRA_EXTENSION_FLAGS */ 0)
+
DEFINE_RISCV_EXT(
/* NAME */ smstateen,
/* UPPERCASE_NAME */ SMSTATEEN,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 725dc879349..73868798db6 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -347,6 +347,8 @@ Mask(SMMPM) Var(riscv_sm_subext)
Mask(SMNPM) Var(riscv_sm_subext)
+Mask(SMRNMI) Var(riscv_sm_subext)
+
Mask(SMSTATEEN) Var(riscv_sm_subext)
Mask(SMDBLTRP) Var(riscv_sm_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index ca7414e0c7a..2d2631e726d 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -518,6 +518,10 @@
@tab 1.0
@tab smnpm extension
+@item smrnmi
+@tab 1.0
+@tab Resumable Non-Maskable Interrupts
+
@item smstateen
@tab 1.0
@tab State enable extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
new file mode 100644
index 00000000000..8e6254043fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smrnmi -mabi=lp64" } */
+int foo()
+{
+}
--
2.43.0
