From: Yunze Zhu <yunze...@linux.alibaba.com> This series add xtheadvector-specific segment load/store intrinsics support, including: [1/4] xtheadvector unit stride segment load/store intrinsics, [2/4] xtheadvector stride segment load/store intrinsics, [3/4] xtheadvector indexed stride segment load/store intrinsics, [4/4] xtheadvector fault-only-first stride segment load intrinsics.
The goal is to enhance support for xtheadvector extension by adding generation of xtheadvector-specific segment load/store instructions with intrinsics. https://github.com/XUANTIE-RV/thead-extension-spec/pull/66 gcc/config.gcc | 2 +- gcc/config/riscv/riscv-vector-builtins-shapes.cc | 74 ++++++++ gcc/config/riscv/riscv-vector-builtins-shapes.h | 2 + gcc/config/riscv/riscv-vector-builtins-types.def | 82 ++++++++ gcc/config/riscv/riscv-vector-builtins.cc | 92 +++++++++ gcc/config/riscv/t-riscv | 19 ++ gcc/config/riscv/thead-vector-builtins-bases.cc | 318 ++++++++++++++++++++++++++++++++ gcc/config/riscv/thead-vector-builtins-bases.h | 44 +++++ gcc/config/riscv/thead-vector-builtins-functions.def | 12 ++ gcc/config/riscv/thead-vector.md | 267 +++++++++++++++++++++++++++ gcc/config/riscv/thead.cc | 68 ++++--- gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlseg-vsseg.c | 118 ++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlsegff-vsseg.c | 118 ++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlsegu-vsseg.c | 116 ++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlseguff-vsseg.c | 115 ++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlsseg-vssseg.c | 125 +++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlssegu-vssseg.c | 125 +++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlxseg-vsxseg.c | 125 +++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlxsegu-vsxseg.c | 125 +++++++++++++ 19 files changed, 1922 insertions(+), 25 deletions(-)
