Two of the three uses of aarch64_imm24 included the important follow-up
tests vs aarch64_move_imm and aarch64_plus_operand. Lack of the exclusion
within aarch64_if_then_else_costs produced incorrect costing.
Since aarch64_split_imm24 has already matched a non-negative CONST_INT,
drill down from aarch64_plus_operand to aarch64_uimm12_shift.
gcc:
* config/aarch64/predicates.md (aarch64_split_imm24): Rename from
aarch64_imm24; exclude aarch64_move_imm and aarch64_uimm12_shift.
* config/aarch64/aarch64.md (*aarch64_bcond_wide_imm<GPI>):
Update for aarch64_split_imm24.
(*compare_cstore<GPI>_insn): Likewise.
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Likewise.
---
gcc/config/aarch64/aarch64.cc | 2 +-
gcc/config/aarch64/aarch64.md | 12 ++++--------
gcc/config/aarch64/predicates.md | 13 +++++++++----
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 9c35f679d28..c12365868b7 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14414,7 +14414,7 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2,
int *cost, bool speed)
if ((cmpcode == NE || cmpcode == EQ)
&& (cmpmode == SImode || cmpmode == DImode)
- && aarch64_imm24 (comparator, cmpmode))
+ && aarch64_split_imm24 (comparator, cmpmode))
{
/* SUB and SUBS. */
*cost += rtx_cost (inner, cmpmode, cmpcode, 0, speed);
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 9aea00cf45a..c7b1b8b3860 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -990,12 +990,10 @@
;; b<ne,eq> .Label
(define_insn_and_split "*aarch64_bcond_wide_imm<GPI:mode>"
[(set (pc) (if_then_else (EQL (match_operand:GPI 0 "register_operand" "r")
- (match_operand:GPI 1 "aarch64_imm24" "n"))
+ (match_operand:GPI 1 "aarch64_split_imm24" "n"))
(label_ref:P (match_operand 2))
(pc)))]
- "!aarch64_move_imm (INTVAL (operands[1]), <GPI:MODE>mode)
- && !aarch64_plus_operand (operands[1], <GPI:MODE>mode)
- && !reload_completed"
+ "!reload_completed"
"#"
"&& true"
[(const_int 0)]
@@ -4646,11 +4644,9 @@
(define_insn_and_split "*compare_cstore<mode>_insn"
[(set (match_operand:GPI 0 "register_operand" "=r")
(EQL:GPI (match_operand:GPI 1 "register_operand" "r")
- (match_operand:GPI 2 "aarch64_imm24" "n")))
+ (match_operand:GPI 2 "aarch64_split_imm24" "n")))
(clobber (reg:CC CC_REGNUM))]
- "!aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)
- && !aarch64_plus_operand (operands[2], <MODE>mode)
- && !reload_completed"
+ "!reload_completed"
"#"
"&& true"
[(const_int 0)]
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 4d5d57f1e5d..af6f00e7353 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -286,10 +286,15 @@
(and (match_code "const_int")
(match_test "UINTVAL (op) <= 7")))
-;; An immediate that fits into 24 bits.
-(define_predicate "aarch64_imm24"
- (and (match_code "const_int")
- (match_test "IN_RANGE (UINTVAL (op), 0, 0xffffff)")))
+;; An immediate that fits into 24 bits, but needs splitting.
+(define_predicate "aarch64_split_imm24"
+ (match_code "const_int")
+{
+ unsigned HOST_WIDE_INT i = UINTVAL (op);
+ return (IN_RANGE (i, 0, 0xffffff)
+ && !aarch64_move_imm (i, mode)
+ && !aarch64_uimm12_shift (i));
+})
(define_predicate "aarch64_mem_pair_offset"
(and (match_code "const_int")
--
2.34.1
