Emm, seems this adjustment is not that correct, let me revisit and send v2 if
possible.
Pan
-----Original Message-----
From: Li, Pan2 <pan2...@intel.com>
Sent: Tuesday, August 19, 2025 11:10 AM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp....@gmail.com; Chen, Ken <ken.c...@intel.com>; Liu, Hongtao
<hongtao....@intel.com>; Li, Pan2 <pan2...@intel.com>
Subject: [PATCH v1 4/4] RISC-V: Adjust the asm check after enable vmacc.vx
combine
From: Pan Li <pan2...@intel.com>
After enable the vmacc.vx by introducing the define_insn, the
below asm need to adjust for this change.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c: Adjust
asm check for vx.
* gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c: Ditto.
* gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c: Ditto.
* gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c: Ditto.
Signed-off-by: Pan Li <pan2...@intel.com>
---
.../gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c | 8 ++++----
.../gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c | 8 ++++----
.../gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c | 8 ++++----
.../gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c | 8 ++++----
4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c
index f07ad68cd74..88d97e8c4f8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-4.c
@@ -91,8 +91,8 @@ void f4 (void * in, void *out, int64_t x, int n)
/*
** f5:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
** ...
*/
void f5 (void * in, void *out, int64_t x, int n)
@@ -107,8 +107,8 @@ void f5 (void * in, void *out, int64_t x, int n)
/*
** f6:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
** ...
*/
void f6 (void * in, void *out, int64_t x, int n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c
index c554036d8e1..f289d6757e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-5.c
@@ -91,8 +91,8 @@ void f4 (void * in, void *out, int64_t x, int n)
/*
** f5:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
** ...
*/
void f5 (void * in, void *out, int64_t x, int n)
@@ -107,8 +107,8 @@ void f5 (void * in, void *out, int64_t x, int n)
/*
** f6:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+
** ...
*/
void f6 (void * in, void *out, int64_t x, int n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c
index cb593bcf97f..65021143d49 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-6.c
@@ -96,8 +96,8 @@ void f4 (void * in, void *out, int64_t x, int n)
/*
** f5:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
** ...
*/
void f5 (void * in, void *out, int64_t x, int n)
@@ -113,8 +113,8 @@ void f5 (void * in, void *out, int64_t x, int n)
/*
** f6:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
** ...
*/
void f6 (void * in, void *out, int64_t x, int n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c
index e87f6ec3362..031f640e5a7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/ternop_vx_constraint-7.c
@@ -96,8 +96,8 @@ void f4 (void * in, void *out, int64_t x, int n)
/*
** f5:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
** ...
*/
void f5 (void * in, void *out, int64_t x, int n)
@@ -113,8 +113,8 @@ void f5 (void * in, void *out, int64_t x, int n)
/*
** f6:
** ...
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
-** vma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
+** vma[c-d][c-d]\.vx\tv[0-9]+,\s*[a-x][0-9]+,\s*v[0-9]+,v0.t
** ...
*/
void f6 (void * in, void *out, int64_t x, int n)
--
2.43.0
