Hi FX, thanks for the patch.
> On 9 Oct 2025, at 09:17, FX Coudert <[email protected]> wrote: > > Complete the list of M3 cores (Ibiza, Palma and Lobos) This looks fine to me. > and add the M4 > cores (Donan and two types of Brava). > The values for chip IDs and the LITTLE.big variants have been taken from > lists in the XNU sources (xnu/osfmk/arm/cpuid.h) in xnu-11417.101.15. > > The choice of listing the M4 core as V8.7A is matching the documented ISA > as well as the LLVM implementation. OK - that makes sense - but do we need to claim SME separately? - although I am not sure we can yet handle SME without SVE in GCC? - advice from Tamar on this would be welcome. > OK for trunk? It’s OK from a Darwin PoV (with an answer for the SME part), but needs an ack from the AArch64 maintainer - since the port is not upstreamed (but this would allow those chip versions on Linux, and I believe that there are some in use already) thanks Iain > > FX > >
0001-aarch64-Darwin-Improve-Apple-M3-cores-add-M4.patch
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