Pushed to r16-5505. Thanks!
在 2025/11/14 上午11:05, zhaozhou 写道:
When use 256 bits vec for move src to dest, extract the base address what plus operation to promote the combine of RTX. gcc/ChangeLog: * config/loongarch/loongarch.cc: Extract plus operation. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lasx/lasx-struct-move.c: New test. --- gcc/config/loongarch/loongarch.cc | 10 ++++++++++ .../loongarch/vector/lasx/lasx-struct-move.c | 17 +++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-struct-move.c diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index fcca0ec8252..848ed868473 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -5922,6 +5922,16 @@ loongarch_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length, /* Allocate a buffer for the temporary registers. */ regs = XALLOCAVEC (rtx, num_reg);+ /* Extract the base address what plus operation to promote the combine of+ RTX. */ + if (GET_CODE (XEXP (dest, 0)) == PLUS) + { + unsigned int dest_align = MEM_ALIGN (dest); + rtx dest_reg = copy_addr_to_reg (XEXP (dest, 0)); + dest = change_address (dest, BLKmode, dest_reg); + set_mem_align (dest, dest_align); + } + for (delta_cur = delta, i = 0, offs = 0; offs < length; delta_cur /= 2) { mode = loongarch_mode_for_move_size (delta_cur); diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-struct-move.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-struct-move.c new file mode 100644 index 00000000000..ca10e9f47a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-struct-move.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -lasx" } */ + +struct vec +{ + int vec_a[32]; + double vec_b[5]; + char vec_c[32]; +}; + +void +foo (struct vec *dest, struct vec *src, int index) +{ + dest[index] = *src; +} + +/* { dg-final { scan-assembler-times "alsl\.d" 3} } */
