[PATCH v1 0/6] Add vr2gpr and vr2fpr cost value param

[pan2 . li]

From: Pan Li <pan2...@intel.com>

The enhanced middle-end record_stmt_cost introduce slp_node and its'
vectype for cost model, that make the vr to scalar cost is counted
during backend adjust cost.  Thus, to make test happy, add param
include both the vr2gpr and vr2fpr cost.

Pan Li (6):
  RISC-V: Introduce vr2gpr-cost= for customizing the cost when vr2gpr [PR123916]
  RISC-V: Adjust the vx-[456]* testcase by param=vr2gpr-cost [PR123916]
  RISC-V: Introduce vr2fpr-cost= for customizing the cost when vr2fpr [PR123916]
  RISC-V: Adjust the vf-[378]* testcase by param=vr2fpr-cost [PR123916]
  RISC-V: Add test case for PR123916
  RISC-V: Adjust testcase asm check for vx-[56]-i[16|8].c [PR123916]

 gcc/config/riscv/riscv-opts.h                 |  7 ++-
 gcc/config/riscv/riscv-protos.h               |  2 +
 gcc/config/riscv/riscv-vector-costs.cc        |  4 +-
 gcc/config/riscv/riscv.cc                     | 34 ++++++++++++-
 gcc/config/riscv/riscv.opt                    |  8 ++++
 .../gcc.target/riscv/rvv/autovec/pr123916.c   | 48 +++++++++++++++++++
 .../riscv/rvv/autovec/vx_vf/vf-3-f16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-3-f32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-3-f64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-7-f16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-7-f32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-7-f64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-8-f16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-8-f32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vf-8-f64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-i16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-i32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-i64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-i8.c         |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-u16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-u32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-u64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-4-u8.c         |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-i16.c        |  6 +--
 .../riscv/rvv/autovec/vx_vf/vx-5-i32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-i64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-i8.c         |  6 +--
 .../riscv/rvv/autovec/vx_vf/vx-5-u16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-u32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-u64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-5-u8.c         |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-i16.c        |  6 +--
 .../riscv/rvv/autovec/vx_vf/vx-6-i32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-i64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-i8.c         |  6 +--
 .../riscv/rvv/autovec/vx_vf/vx-6-u16.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-u32.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-u64.c        |  2 +-
 .../riscv/rvv/autovec/vx_vf/vx-6-u8.c         |  2 +-
 39 files changed, 138 insertions(+), 47 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123916.c

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2.43.0