From: Pan Li <[email protected]>
Form 10 is supported already, add test to make sure of it.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_arith.h: Add form 10.
* gcc.target/riscv/sat/sat_u_mul-11-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-11-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-11-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-11-u8.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-11-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-11-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-11-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-11-u8.c: New test.
Signed-off-by: Pan Li <[email protected]>
---
gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 12 ++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-11-u16.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-11-u32.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-11-u64.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-11-u8.c | 11 +++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-11-u16.c | 15 +++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-11-u32.c | 15 +++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-11-u64.c | 15 +++++++++++++++
.../gcc.target/riscv/sat/sat_u_mul-run-11-u8.c | 15 +++++++++++++++
9 files changed, 116 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u8.c
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 16d29c85f42..cc55228b0ad 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -811,4 +811,16 @@ sat_u_mul_##T##_fmt_9 (T a, T b)
\
#define RUN_SAT_U_MUL_FMT_9(T, a, b) sat_u_mul_##T##_fmt_9(a, b)
#define RUN_SAT_U_MUL_FMT_9_WRAP(T, a, b) RUN_SAT_U_MUL_FMT_9(T, a, b)
+#define DEF_SAT_U_MUL_FMT_10(T) \
+T __attribute__((noinline)) \
+sat_u_mul_##T##_fmt_10 (T a, T b) \
+{ \
+ T result; \
+ return __builtin_mul_overflow (a, b, &result) == 0 ? result : -1; \
+}
+
+#define DEF_SAT_U_MUL_FMT_10_WRAP(T) DEF_SAT_U_MUL_FMT_10(T)
+#define RUN_SAT_U_MUL_FMT_10(T, a, b) sat_u_mul_##T##_fmt_10(a, b)
+#define RUN_SAT_U_MUL_FMT_10_WRAP(T, a, b) RUN_SAT_U_MUL_FMT_10(T, a, b)
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u16.c
new file mode 100644
index 00000000000..c141bd0baa7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define T uint16_t
+
+DEF_SAT_U_MUL_FMT_10_WRAP(T)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u32.c
new file mode 100644
index 00000000000..17b249505ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define T uint32_t
+
+DEF_SAT_U_MUL_FMT_10_WRAP(T)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u64.c
new file mode 100644
index 00000000000..dde927e8e35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define T uint64_t
+
+DEF_SAT_U_MUL_FMT_10_WRAP(T)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u8.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u8.c
new file mode 100644
index 00000000000..5455667182c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-11-u8.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define T uint8_t
+
+DEF_SAT_U_MUL_FMT_10_WRAP(T)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u16.c
new file mode 100644
index 00000000000..1bbe893bdd9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_10_WRAP(NT, x, y)
+
+DEF_SAT_U_MUL_FMT_10_WRAP(NT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u32.c
new file mode 100644
index 00000000000..81aff66c046
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_10_WRAP(NT, x, y)
+
+DEF_SAT_U_MUL_FMT_10_WRAP(NT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u64.c
new file mode 100644
index 00000000000..42050095700
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_10_WRAP(NT, x, y)
+
+DEF_SAT_U_MUL_FMT_10_WRAP(NT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u8.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u8.c
new file mode 100644
index 00000000000..3b0f491833f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-11-u8.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_10_WRAP(NT, x, y)
+
+DEF_SAT_U_MUL_FMT_10_WRAP(NT)
+
+#include "scalar_sat_binary_run_xxx.h"
--
2.43.0
