From: Andrew Bennett <[email protected]>
gcc/
* config/mips/mips.md (<optab><mode>3): Check
TARGET_DEBUG_D_MODE before split.
* config/mips/mips.opt: Enable -mdebugd by default.
gcc/testsuite/
* gcc.target/mips/mips.exp: Add debugd to the test options.
* gcc.target/mips/mips16-debugd-shift-1.c: New test.
* gcc.target/mips/mips16-debugd-shift-2.c: New test.
Cherry-picked adb95984114b7636ee15f2ba79f94b028c8b35b2
from https://github.com/MIPS/gcc
Signed-off-by: Andrew Bennett <[email protected]>
Signed-off-by: Faraz Shahbazker <[email protected]>
Signed-off-by: Aleksandar Rakic <[email protected]>
Signed-off-by: Eldar Osmanovic <[email protected]>
---
gcc/config/mips/mips.md | 1 +
gcc/config/mips/mips.opt | 2 +-
gcc/testsuite/gcc.target/mips/mips.exp | 1 +
.../gcc.target/mips/mips16-debugd-shift-1.c | 13 +++++++++++++
.../gcc.target/mips/mips16-debugd-shift-2.c | 12 ++++++++++++
5 files changed, 28 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/mips/mips16-debugd-shift-1.c
create mode 100644 gcc/testsuite/gcc.target/mips/mips16-debugd-shift-2.c
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 18244e4abcc..c1507b9b825 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5868,6 +5868,7 @@
be careful not to allocate a new register if we've reached the
reload pass. */
if (TARGET_MIPS16
+ && !TARGET_DEBUG_D_MODE
&& optimize
&& CONST_INT_P (operands[2])
&& INTVAL (operands[2]) > 8
diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index eb14761ea27..ebb719c51bc 100644
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -127,7 +127,7 @@ mdebug
Target Var(TARGET_DEBUG_MODE) Undocumented
mdebugd
-Target Var(TARGET_DEBUG_D_MODE) Undocumented
+Target Var(TARGET_DEBUG_D_MODE) Undocumented Init(1)
meb
Target RejectNegative Mask(BIG_ENDIAN)
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp
b/gcc/testsuite/gcc.target/mips/mips.exp
index 9492b1dcaf8..eb527fdf399 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -277,6 +277,7 @@ for { set option 0 } { $option < 32 } { incr option } {
foreach option {
abicalls
branch-likely
+ debugd
dsp
dspr2
explicit-relocs
diff --git a/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-1.c
b/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-1.c
new file mode 100644
index 00000000000..f8252d85708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mips16 isa_rev<=5 -mgp32 -fdump-rtl-expand" } */
+/* { dg-skip-if "requires -O2" { *-*-* } { "*" } { "-O2" } } */
+
+int
+foo (int a)
+{
+ return a << 13;
+}
+
+/* { dg-final { scan-rtl-dump-times {\(const_int 13} 1 "expand" } } */
+/* { dg-final { scan-rtl-dump-not {\(const_int 8} "expand" } } */
+/* { dg-final { scan-rtl-dump-not {\(const_int 5} "expand" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-2.c
b/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-2.c
new file mode 100644
index 00000000000..e439c79bfe7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/mips16-debugd-shift-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mips16 isa_rev<=5 -mgp32 -mno-debugd -fdump-rtl-expand" } */
+/* { dg-skip-if "requires -O2" { *-*-* } { "*" } { "-O2" } } */
+
+int
+foo (int a)
+{
+ return a << 13;
+}
+
+/* { dg-final { scan-rtl-dump-times {\(const_int 8} 1 "expand" } } */
+/* { dg-final { scan-rtl-dump-times {\(const_int 5} 1 "expand" } } */
--
2.43.0
