From: Pan Li <[email protected]>
The form 17 of unsigned scalar SAT_MUL has supported from
the previous change. Thus, add the test cases to make sure
it works well
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-18-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u64.c: New test.
Signed-off-by: Pan Li <[email protected]>
---
gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-18-u16-from-u128.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u16-from-u32.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u32-from-u128.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u64-from-u128.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u8-from-u128.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u8-from-u16.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u8-from-u32.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c | 11 +++++++++++
.../riscv/sat/sat_u_mul-run-18-u16-from-u128.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u16-from-u32.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u16-from-u64.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u32-from-u128.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u32-from-u64.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u64-from-u128.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u8-from-u128.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u8-from-u16.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u8-from-u32.c | 16 ++++++++++++++++
.../riscv/sat/sat_u_mul-run-18-u8-from-u64.c | 16 ++++++++++++++++
24 files changed, 319 insertions(+)
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u64-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u64-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u128.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u64.c
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 6816afc849d..5c8ca0c1ca1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -917,4 +917,20 @@ sat_u_mul_##NT##_from_##WT##_fmt_16 (NT a, NT b) \
#define RUN_SAT_U_MUL_FMT_16_WRAP(NT, WT, a, b) \
RUN_SAT_U_MUL_FMT_16(NT, WT, a, b)
+#define DEF_SAT_U_MUL_FMT_17(NT, WT) \
+NT __attribute__((noinline)) \
+sat_u_mul_##NT##_from_##WT##_fmt_17 (NT a, NT b) \
+{ \
+ WT x = (WT)a * (WT)b; \
+ NT lo = (NT)x; \
+ bool non_overflow_p = x >> (sizeof(NT) * 8) == 0; \
+ return non_overflow_p ? lo : -1; \
+}
+
+#define DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT) DEF_SAT_U_MUL_FMT_17(NT, WT)
+#define RUN_SAT_U_MUL_FMT_17(NT, WT, a, b) \
+ sat_u_mul_##NT##_from_##WT##_fmt_17 (a, b)
+#define RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, a, b) \
+ RUN_SAT_U_MUL_FMT_17(NT, WT, a, b)
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u128.c
new file mode 100644
index 00000000000..63d36c49dcd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u128.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u32.c
new file mode 100644
index 00000000000..13037c3d1b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c
new file mode 100644
index 00000000000..6cdbce97525
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c
new file mode 100644
index 00000000000..a64364e0d83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u16-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint16_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u128.c
new file mode 100644
index 00000000000..26d0659a0a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u128.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c
new file mode 100644
index 00000000000..4dc83c14755
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c
new file mode 100644
index 00000000000..bd31e88596e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u32-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint32_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u64-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u64-from-u128.c
new file mode 100644
index 00000000000..c7d2d273f1b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u64-from-u128.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint64_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u128.c
new file mode 100644
index 00000000000..1f716fde611
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u128.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint128_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u16.c
new file mode 100644
index 00000000000..ca74a39ddfd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint16_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u32.c
new file mode 100644
index 00000000000..befe74534a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint32_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c
new file mode 100644
index 00000000000..334d8443272
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32 -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c
new file mode 100644
index 00000000000..c341680e76b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-18-u8-from-u64.rv64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+#define NT uint8_t
+#define WT uint64_t
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u128.c
new file mode 100644
index 00000000000..e0971c24a27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u32.c
new file mode 100644
index 00000000000..3c8c6d089d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u64.c
new file mode 100644
index 00000000000..0056f0e4a93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u16-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint16_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u128.c
new file mode 100644
index 00000000000..15e0e0156b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint32_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u64.c
new file mode 100644
index 00000000000..d24dc15b6b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u32-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint32_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u64-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u64-from-u128.c
new file mode 100644
index 00000000000..184a36f4ef2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u64-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint64_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u128.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u128.c
new file mode 100644
index 00000000000..e0971c24a27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u128.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint128_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u16.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u16.c
new file mode 100644
index 00000000000..5a4b507bf35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint16_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u32.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u32.c
new file mode 100644
index 00000000000..d910934d425
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint32_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u64.c
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u64.c
new file mode 100644
index 00000000000..9cb1439dad0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-18-u8-from-u64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { rv32 || rv64 } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define NT uint8_t
+#define WT uint64_t
+#define NAME usmul
+#define DATA TEST_BINARY_DATA_WRAP(NT, NAME)
+#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME)
+#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_17_WRAP(NT, WT, x, y)
+
+DEF_SAT_U_MUL_FMT_17_WRAP(NT, WT)
+
+#include "scalar_sat_binary_run_xxx.h"
--
2.43.0
