This is part seven of the dense math register patches for the PowerPC. This patch adds dense math tests for -mcpu=future, cloning the mma-builtin-*.c tests.
I have built bootstrap little endian compilers on power10 systems, and big endian compiler on power9 systems. There were no regression in the tests. Can I add the patches to the GCC trunk? 2026-07-01 Michael Meissner <[email protected]> gcc/testsuite/ * gcc.target/powerpc/dm-builtin-1.c: New test. * gcc.target/powerpc/dm-builtin-10-pair.c: Likewise. * gcc.target/powerpc/dm-builtin-10-quad.c: Likewise. * gcc.target/powerpc/dm-builtin-2.c: Likewise. * gcc.target/powerpc/dm-builtin-3.c: Likewise. * gcc.target/powerpc/dm-builtin-4.c: Likewise. * gcc.target/powerpc/dm-builtin-5.c: Likewise. * gcc.target/powerpc/dm-builtin-6.c: Likewise. * gcc.target/powerpc/dm-builtin-7.c: Likewise. * gcc.target/powerpc/dm-builtin-8.c: Likewise. * gcc.target/powerpc/dm-builtin-9.c: Likewise. --- .../gcc.target/powerpc/dm-builtin-1.c | 313 ++++++++++++++++++ .../gcc.target/powerpc/dm-builtin-10-pair.c | 21 ++ .../gcc.target/powerpc/dm-builtin-10-quad.c | 23 ++ .../gcc.target/powerpc/dm-builtin-2.c | 72 ++++ .../gcc.target/powerpc/dm-builtin-3.c | 31 ++ .../gcc.target/powerpc/dm-builtin-4.c | 73 ++++ .../gcc.target/powerpc/dm-builtin-5.c | 47 +++ .../gcc.target/powerpc/dm-builtin-6.c | 21 ++ .../gcc.target/powerpc/dm-builtin-7.c | 26 ++ .../gcc.target/powerpc/dm-builtin-8.c | 27 ++ .../gcc.target/powerpc/dm-builtin-9.c | 28 ++ 11 files changed, 682 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c new file mode 100644 index 00000000000..b2aab020ca4 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-1.c @@ -0,0 +1,313 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo0 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvi4ger8 (&acc, vec0, vec1); + __builtin_mma_xvi4ger8pp (&acc, vec0, vec1); + dst[0] = acc; +} + +void +foo1 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvi8ger4 (&acc, vec0, vec1); + __builtin_mma_xvi8ger4pp (&acc, vec0, vec1); + __builtin_mma_xvi8ger4spp(&acc, vec0, vec1); + dst[1] = acc; +} + +void +foo2 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvi16ger2 (&acc, vec0, vec1); + __builtin_mma_xvi16ger2pp (&acc, vec0, vec1); + dst[2] = acc; +} + +void +foo3 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvi16ger2s (&acc, vec0, vec1); + __builtin_mma_xvi16ger2spp (&acc, vec0, vec1); + dst[3] = acc; +} + +void +foo4 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvf16ger2 (&acc, vec0, vec1); + __builtin_mma_xvf16ger2pp (&acc, vec0, vec1); + __builtin_mma_xvf16ger2pn (&acc, vec0, vec1); + dst[4] = acc; +} + +void +foo4b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_xvf16ger2np (&acc, vec0, vec1); + __builtin_mma_xvf16ger2nn (&acc, vec0, vec1); + dst[4] = acc; +} + +void +foo5 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvbf16ger2 (&acc, vec0, vec1); + __builtin_mma_xvbf16ger2pp (&acc, vec0, vec1); + __builtin_mma_xvbf16ger2pn (&acc, vec0, vec1); + dst[5] = acc; +} + +void +foo5b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_xvbf16ger2np (&acc, vec0, vec1); + __builtin_mma_xvbf16ger2nn (&acc, vec0, vec1); + dst[5] = acc; +} + +void +foo6 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_xvf32ger (&acc, vec0, vec1); + __builtin_mma_xvf32gerpp (&acc, vec0, vec1); + __builtin_mma_xvf32gerpn (&acc, vec0, vec1); + dst[6] = acc; +} + +void +foo6b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_xvf32gernp (&acc, vec0, vec1); + __builtin_mma_xvf32gernn (&acc, vec0, vec1); + dst[6] = acc; +} + +void +foo7 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvi4ger8 (&acc, vec0, vec1, 15, 15, 255); + __builtin_mma_pmxvi4ger8pp (&acc, vec0, vec1, 15, 15, 255); + dst[7] = acc; +} + +void +foo8 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvi8ger4 (&acc, vec0, vec1, 15, 15, 15); + __builtin_mma_pmxvi8ger4pp (&acc, vec0, vec1, 15, 15, 15); + __builtin_mma_pmxvi8ger4spp(&acc, vec0, vec1, 15, 15, 15); + dst[8] = acc; +} + +void +foo9 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvi16ger2 (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvi16ger2pp (&acc, vec0, vec1, 15, 15, 3); + dst[9] = acc; +} + +void +foo10 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvi16ger2s (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvi16ger2spp (&acc, vec0, vec1, 15, 15, 3); + dst[10] = acc; +} + +void +foo11 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvf16ger2 (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvf16ger2pp (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvf16ger2pn (&acc, vec0, vec1, 15, 15, 3); + dst[11] = acc; +} + +void +foo11b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_pmxvf16ger2np (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvf16ger2nn (&acc, vec0, vec1, 15, 15, 3); + dst[11] = acc; +} + +void +foo12 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvbf16ger2 (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvbf16ger2pp (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvbf16ger2pn (&acc, vec0, vec1, 15, 15, 3); + dst[12] = acc; +} + +void +foo12b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_pmxvbf16ger2np (&acc, vec0, vec1, 15, 15, 3); + __builtin_mma_pmxvbf16ger2nn (&acc, vec0, vec1, 15, 15, 3); + dst[12] = acc; +} + +void +foo13 (__vector_quad *dst, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + __builtin_mma_pmxvf32ger (&acc, vec0, vec1, 15, 15); + __builtin_mma_pmxvf32gerpp (&acc, vec0, vec1, 15, 15); + __builtin_mma_pmxvf32gerpn (&acc, vec0, vec1, 15, 15); + dst[13] = acc; +} + +void +foo13b (__vector_quad *dst, __vector_quad *src, vec_t *vec) +{ + __vector_quad acc; + vec_t vec0 = vec[0]; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_pmxvf32gernp (&acc, vec0, vec1, 15, 15); + __builtin_mma_pmxvf32gernn (&acc, vec0, vec1, 15, 15); + dst[13] = acc; +} + +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-times {\mlxv\M} 40 } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 40 } } */ +/* { dg-final { scan-assembler-times {\mdmxvbf16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvbf16ger2nn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvbf16ger2np\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvbf16ger2pn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvbf16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf16ger2nn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf16ger2np\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf16ger2pn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf32ger\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf32gernn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf32gernp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf32gerpn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf32gerpp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi16ger2s\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi16ger2spp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi4ger8\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi4ger8pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi8ger4\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi8ger4pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvi8ger4spp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvbf16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvbf16ger2nn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvbf16ger2np\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvbf16ger2pn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvbf16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf16ger2nn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf16ger2np\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf16ger2pn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf32ger\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf32gernn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf32gernp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf32gerpn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf32gerpp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi16ger2\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi16ger2pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi16ger2s\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi16ger2spp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi4ger8\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi4ger8pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi8ger4\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi8ger4pp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvi8ger4spp\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c new file mode 100644 index 00000000000..e6cb49fb667 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-pair.c @@ -0,0 +1,21 @@ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_pair *dst, vec_t *src) +{ + __vector_pair pair0, pair1; + /* Adjacent loads should be combined into one lxvp instruction + and identical build pairs should be combined. */ + __builtin_vsx_build_pair (&pair0, src[0], src[1]); + __builtin_vsx_build_pair (&pair1, src[0], src[1]); + dst[0] = pair0; + dst[2] = pair1; +} + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mstxv\M} } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c new file mode 100644 index 00000000000..589b3dca842 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-10-quad.c @@ -0,0 +1,23 @@ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_quad *dst, vec_t *src) +{ + __vector_quad quad0, quad1; + /* Adjacent loads should be combined into two lxvp instructions. + and identical build accs should not be combined. */ + __builtin_mma_build_acc (&quad0, src[0], src[1], src[2], src[3]); + __builtin_mma_build_acc (&quad1, src[0], src[1], src[2], src[3]); + dst[0] = quad0; + dst[2] = quad1; +} + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mstxv\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c new file mode 100644 index 00000000000..880e7a871aa --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-2.c @@ -0,0 +1,72 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo0 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp) +{ + __vector_quad acc; + __vector_pair vecp0 = *pvecp; + vec_t vec1 = vec[1]; + + __builtin_mma_xvf64ger (&acc, vecp0, vec1); + __builtin_mma_xvf64gerpp (&acc, vecp0, vec1); + __builtin_mma_xvf64gerpn (&acc, vecp0, vec1); + dst[0] = acc; +} + +void +foo1 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp) +{ + __vector_quad acc; + __vector_pair vecp0 = *pvecp; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_xvf64gernp (&acc, vecp0, vec1); + __builtin_mma_xvf64gernn (&acc, vecp0, vec1); + dst[0] = acc; +} + +void +foo2 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp) +{ + __vector_quad acc; + __vector_pair vecp0 = *pvecp; + vec_t vec1 = vec[1]; + __builtin_mma_pmxvf64ger (&acc, vecp0, vec1, 15, 3); + __builtin_mma_pmxvf64gerpp (&acc, vecp0, vec1, 15, 3); + __builtin_mma_pmxvf64gerpn (&acc, vecp0, vec1, 15, 3); + dst[1] = acc; +} + +void +foo3 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp) +{ + __vector_quad acc; + __vector_pair vecp0 = *pvecp; + vec_t vec1 = vec[1]; + + acc = src[0]; + __builtin_mma_pmxvf64gernp (&acc, vecp0, vec1, 15, 3); + __builtin_mma_pmxvf64gernn (&acc, vecp0, vec1, 15, 3); + dst[1] = acc; +} + +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-times {\mlxv\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 8 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 8 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf64ger\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf64gerpp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf64gerpn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf64gernp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxvf64gernn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf64ger\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf64gerpp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf64gerpn\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf64gernp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpmdmxvf64gernn\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c new file mode 100644 index 00000000000..798a9dc69f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-3.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +void +foo0 (void) +{ + __vector_quad acc; + asm ("#..." : "=d" (acc)); + __builtin_mma_xxmtacc (&acc); + __builtin_mma_xxmfacc (&acc); + asm ("#..." :: "d" (acc)); +} + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo1 (vec_t *vec) +{ + vec[1] = __builtin_vsx_xvcvspbf16 (vec[0]); + vec[3] = __builtin_vsx_xvcvbf16spn (vec[2]); +} + +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-not {\mlxvp\M} } } */ +/* { dg-final { scan-assembler-not {\mstxvp\M} } } */ +/* { dg-final { scan-assembler-times {\mlxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvcvspbf16\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvcvbf16spn\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c new file mode 100644 index 00000000000..cd62fc8579a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-4.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_pair *dst, vec_t *src) +{ + __vector_pair pair; + __builtin_mma_assemble_pair (&pair, src[0], src[4]); + *dst = pair; +} + +void +foo2 (__vector_pair *dst, vec_t *src) +{ + __vector_pair pair; + __builtin_vsx_assemble_pair (&pair, src[0], src[4]); + *dst = pair; +} + +void +foo3 (__vector_pair *dst, vec_t *src) +{ + __vector_pair pair; + __builtin_vsx_build_pair (&pair, src[4], src[0]); + *dst = pair; +} + +void +bar (vec_t *dst, __vector_pair *src) +{ + vec_t res[2]; + __builtin_mma_disassemble_pair (res, src); + dst[0] = res[0]; + dst[4] = res[1]; +} + +void +bar2 (vec_t *dst, __vector_pair *src) +{ + vec_t res[2]; + __builtin_vsx_disassemble_pair (res, src); + dst[0] = res[0]; + dst[4] = res[1]; +} + +#if !__has_builtin (__builtin_vsx_assemble_pair) +# error "__has_builtin (__builtin_vsx_assemble_pair) failed" +#endif + +#if !__has_builtin (__builtin_vsx_disassemble_pair) +# error "__has_builtin (__builtin_vsx_disassemble_pair) failed" +#endif + +#if !__has_builtin (__builtin_mma_assemble_pair) +# error "__has_builtin (__builtin_mma_assemble_pair) failed" +#endif + +#if !__has_builtin (__builtin_mma_disassemble_pair) +# error "__has_builtin (__builtin_mma_disassemble_pair) failed" +#endif + +#if !__has_builtin (__builtin_vsx_build_pair) +# error "__has_builtin (__builtin_vsx_build_pair) failed" +#endif + +/* { dg-final { scan-assembler-times {\mlxv\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c new file mode 100644 index 00000000000..6890d87bfb9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-5.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_quad *dst, vec_t *src) +{ + __vector_quad acc; + __builtin_mma_assemble_acc (&acc, src[0], src[4], src[8], src[12]); + *dst = acc; +} + +void +foo2 (__vector_quad *dst, vec_t *src) +{ + __vector_quad acc; + __builtin_mma_build_acc (&acc, src[12], src[8], src[4], src[0]); + *dst = acc; +} + +void +bar (vec_t *dst, __vector_quad *src) +{ + vec_t res[4]; + __builtin_mma_disassemble_acc (res, src); + dst[0] = res[0]; + dst[4] = res[1]; + dst[8] = res[2]; + dst[12] = res[3]; +} + +#if !__has_builtin (__builtin_mma_assemble_acc) +# error "__has_builtin (__builtin_mma_assemble_acc) failed" +#endif + +#if !__has_builtin (__builtin_mma_build_acc) +# error "__has_builtin (__builtin_mma_build_acc) failed" +#endif + +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-times {\mlxv\M} 8 } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c new file mode 100644 index 00000000000..37706f79ce5 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-6.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */ + +void +foo (__vector_quad *dst) +{ + __vector_quad acc0, acc1; + __builtin_mma_xxsetaccz (&acc0); + __builtin_mma_xxsetaccz (&acc1); + dst[0] = acc0; + dst[1] = acc1; +} + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mlxvp\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */ +/* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */ +/* { dg-final { scan-assembler-times {\mdmsetdmrz\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mdmxxextfdmr512\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c new file mode 100644 index 00000000000..6e1f62b26c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-7.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +void +foo (__vector_pair *dst, __vector_pair *src, long idx) +{ + dst[0] = __builtin_vsx_lxvp (0, src); + dst[2] = __builtin_vsx_lxvp (32, src); + dst[4] = __builtin_vsx_lxvp (64, src); + /* Non-constant offset should generate a lxvpx. */ + dst[6] = __builtin_vsx_lxvp (idx, src); + /* Non-aligned offset should generate a plxvp. */ + dst[8] = __builtin_vsx_lxvp (257, src); +} + +#if !__has_builtin (__builtin_vsx_lxvp) +# error "__has_builtin (__builtin_vsx_lxvp) failed" +#endif + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mstxv\M} } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlxvpx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mplxvp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 5 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c new file mode 100644 index 00000000000..45d4e9b5290 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-8.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +void +foo (__vector_pair *dst, __vector_pair *src, long idx) +{ + __vector_pair pair = *src; + __builtin_vsx_stxvp (pair, 0, dst); + __builtin_vsx_stxvp (pair, 32, dst); + __builtin_vsx_stxvp (pair, 64, dst); + /* Non-constant offset should generate a stxvpx. */ + __builtin_vsx_stxvp (pair, idx, dst); + /* Non-aligned offset should generate a pstxvp. */ + __builtin_vsx_stxvp (pair, 257, dst); +} + +#if !__has_builtin (__builtin_vsx_stxvp) +# error "__has_builtin (__builtin_vsx_stxvp) failed" +#endif + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mstxv\M} } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mstxvpx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mpstxvp\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c b/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c new file mode 100644 index 00000000000..c62040c0fcb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dm-builtin-9.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_pair *dst, vec_t *src) +{ + __vector_pair pair; + /* Adjacent loads should be combined into one lxvp instruction. */ + __builtin_vsx_build_pair (&pair, src[0], src[1]); + *dst = pair; +} + +void +bar (__vector_quad *dst, vec_t *src) +{ + __vector_quad quad; + /* Adjacent loads should be combined into two lxvp instructions. */ + __builtin_mma_build_acc (&quad, src[0], src[1], src[2], src[3]); + *dst = quad; +} + +/* { dg-final { scan-assembler-not {\mlxv\M} } } */ +/* { dg-final { scan-assembler-not {\mstxv\M} } } */ +/* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */ -- 2.54.0 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: [email protected]
