From: Pan Li <[email protected]>
Add test cases for vsext.vf2 register group overlap, please
note it is not overlap as much as possible.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add group_overlap folder.
* gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h: New test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c: New
test.
Signed-off-by: Pan Li <[email protected]>
---
.../rvv/autovec/group_overlap/group_overlap.h | 131 ++++++++++++++++++
.../autovec/group_overlap/vsext_vf2-i16-m1.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i16-m2.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i16-m4.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i16-mf2.c | 31 +++++
.../autovec/group_overlap/vsext_vf2-i16-mf4.c | 31 +++++
.../autovec/group_overlap/vsext_vf2-i32-m1.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i32-m2.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i32-m4.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i32-mf2.c | 31 +++++
.../autovec/group_overlap/vsext_vf2-i8-m1.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i8-m2.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i8-m4.c | 17 +++
.../autovec/group_overlap/vsext_vf2-i8-mf2.c | 31 +++++
.../autovec/group_overlap/vsext_vf2-i8-mf4.c | 31 +++++
.../autovec/group_overlap/vsext_vf2-i8-mf8.c | 31 +++++
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 +
17 files changed, 472 insertions(+)
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
new file mode 100644
index 00000000000..ab1417f3bef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
@@ -0,0 +1,131 @@
+#ifndef HAVE_DEFINED_GROUP_OVERLAP_H
+#define HAVE_DEFINED_GROUP_OVERLAP_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <riscv_vector.h>
+
+#define LOOP_UNARY_BODY_X4(NT, WT, LD_F, OUT_F, ST_F, OUT, START, VL) \
+ NT vs0 = LD_F ((void *)START, VL); START += VL; \
+ NT vs1 = LD_F ((void *)START, VL); START += VL; \
+ NT vs2 = LD_F ((void *)START, VL); START += VL; \
+ NT vs3 = LD_F ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vs0, VL); \
+ WT vd1 = OUT_F (vs1, VL); \
+ WT vd2 = OUT_F (vs2, VL); \
+ WT vd3 = OUT_F (vs3, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+
+#define LOOP_UNARY_BODY_X8(NT, WT, LD_F, OUT_F, ST_F, OUT, START, VL) \
+ NT vs0 = LD_F ((void *)START, VL); START += VL; \
+ NT vs1 = LD_F ((void *)START, VL); START += VL; \
+ NT vs2 = LD_F ((void *)START, VL); START += VL; \
+ NT vs3 = LD_F ((void *)START, VL); START += VL; \
+ NT vs4 = LD_F ((void *)START, VL); START += VL; \
+ NT vs5 = LD_F ((void *)START, VL); START += VL; \
+ NT vs6 = LD_F ((void *)START, VL); START += VL; \
+ NT vs7 = LD_F ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vs0, VL); \
+ WT vd1 = OUT_F (vs1, VL); \
+ WT vd2 = OUT_F (vs2, VL); \
+ WT vd3 = OUT_F (vs3, VL); \
+ WT vd4 = OUT_F (vs4, VL); \
+ WT vd5 = OUT_F (vs5, VL); \
+ WT vd6 = OUT_F (vs6, VL); \
+ WT vd7 = OUT_F (vs7, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+ ST_F ((void *)out, vd4, VL); OUT += VL; \
+ ST_F ((void *)out, vd5, VL); OUT += VL; \
+ ST_F ((void *)out, vd6, VL); OUT += VL; \
+ ST_F ((void *)out, vd7, VL); OUT += VL; \
+
+#define LOOP_UNARY_BODY_X16(NT, WT, LD_F, OUT_F, ST_F, OUT, START, VL) \
+ NT vs0 = LD_F ((void *)START, VL); START += VL; \
+ NT vs1 = LD_F ((void *)START, VL); START += VL; \
+ NT vs2 = LD_F ((void *)START, VL); START += VL; \
+ NT vs3 = LD_F ((void *)START, VL); START += VL; \
+ NT vs4 = LD_F ((void *)START, VL); START += VL; \
+ NT vs5 = LD_F ((void *)START, VL); START += VL; \
+ NT vs6 = LD_F ((void *)START, VL); START += VL; \
+ NT vs7 = LD_F ((void *)START, VL); START += VL; \
+ NT vs8 = LD_F ((void *)START, VL); START += VL; \
+ NT vs9 = LD_F ((void *)START, VL); START += VL; \
+ NT vs10 = LD_F ((void *)START, VL); START += VL; \
+ NT vs11 = LD_F ((void *)START, VL); START += VL; \
+ NT vs12 = LD_F ((void *)START, VL); START += VL; \
+ NT vs13 = LD_F ((void *)START, VL); START += VL; \
+ NT vs14 = LD_F ((void *)START, VL); START += VL; \
+ NT vs15 = LD_F ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vs0, VL); \
+ WT vd1 = OUT_F (vs1, VL); \
+ WT vd2 = OUT_F (vs2, VL); \
+ WT vd3 = OUT_F (vs3, VL); \
+ WT vd4 = OUT_F (vs4, VL); \
+ WT vd5 = OUT_F (vs5, VL); \
+ WT vd6 = OUT_F (vs6, VL); \
+ WT vd7 = OUT_F (vs7, VL); \
+ WT vd8 = OUT_F (vs8, VL); \
+ WT vd9 = OUT_F (vs9, VL); \
+ WT vd10 = OUT_F (vs10, VL); \
+ WT vd11 = OUT_F (vs11, VL); \
+ WT vd12 = OUT_F (vs12, VL); \
+ WT vd13 = OUT_F (vs13, VL); \
+ WT vd14 = OUT_F (vs14, VL); \
+ WT vd15 = OUT_F (vs15, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+ ST_F ((void *)out, vd4, VL); OUT += VL; \
+ ST_F ((void *)out, vd5, VL); OUT += VL; \
+ ST_F ((void *)out, vd6, VL); OUT += VL; \
+ ST_F ((void *)out, vd7, VL); OUT += VL; \
+ ST_F ((void *)out, vd8, VL); OUT += VL; \
+ ST_F ((void *)out, vd9, VL); OUT += VL; \
+ ST_F ((void *)out, vd10, VL); OUT += VL; \
+ ST_F ((void *)out, vd11, VL); OUT += VL; \
+ ST_F ((void *)out, vd12, VL); OUT += VL; \
+ ST_F ((void *)out, vd13, VL); OUT += VL; \
+ ST_F ((void *)out, vd14, VL); OUT += VL; \
+ ST_F ((void *)out, vd15, VL); OUT += VL; \
+
+#define DEF_GROUP_OVERLAP_UNARY_0(VL_F, NT, WT, LD_F, OUT_F, ST_F, NAME, \
+ LOOP_BODY) \
+ void test_group_overlap_##NAME##_##NT##_unary_0(uint8_t *data, \
+ uint8_t *out, \
+ size_t limit) \
+ { \
+ uint8_t *start = data; \
+ uint8_t *end = data + limit; \
+ size_t vl = VL_F (); \
+ \
+ while (start < end) { \
+ LOOP_BODY (NT, WT, LD_F, OUT_F, ST_F, out, start, vl); \
+ } \
+ }
+
+#endif
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
new file mode 100644
index 00000000000..6b59a0da8ee
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16m1_t,
+ vint32m2_t,
+ __riscv_vle16_v_i16m1,
+ __riscv_vsext_vf2_i32m2,
+ __riscv_vse32_v_i32m2,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
new file mode 100644
index 00000000000..0396046a7b1
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e16m2,
+ vint16m2_t,
+ vint32m4_t,
+ __riscv_vle16_v_i16m2,
+ __riscv_vsext_vf2_i32m4,
+ __riscv_vse32_v_i32m4,
+ vsext_vf,
+ LOOP_UNARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
new file mode 100644
index 00000000000..1670668d04b
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e16m4,
+ vint16m4_t,
+ vint32m8_t,
+ __riscv_vle16_v_i16m4,
+ __riscv_vsext_vf2_i32m8,
+ __riscv_vse32_v_i32m8,
+ vsext_vf,
+ LOOP_UNARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v4} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v8,v12} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
new file mode 100644
index 00000000000..e700eb532a9
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16mf2_t,
+ vint32m1_t,
+ __riscv_vle16_v_i16mf2,
+ __riscv_vsext_vf2_i32m1,
+ __riscv_vse32_v_i32m1,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
new file mode 100644
index 00000000000..ca48d17e13d
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16mf4_t,
+ vint32mf2_t,
+ __riscv_vle16_v_i16mf4,
+ __riscv_vsext_vf2_i32mf2,
+ __riscv_vse32_v_i32mf2,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
new file mode 100644
index 00000000000..461f4ef6b1a
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e32m1,
+ vint32m1_t,
+ vint64m2_t,
+ __riscv_vle32_v_i32m1,
+ __riscv_vsext_vf2_i64m2,
+ __riscv_vse64_v_i64m2,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
new file mode 100644
index 00000000000..6c7d8a5193b
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e32m2,
+ vint32m2_t,
+ vint64m4_t,
+ __riscv_vle32_v_i32m2,
+ __riscv_vsext_vf2_i64m4,
+ __riscv_vse64_v_i64m4,
+ vsext_vf,
+ LOOP_UNARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m4.c
new file mode 100644
index 00000000000..c7ac2a6c940
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m4.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e32m4,
+ vint32m4_t,
+ vint64m8_t,
+ __riscv_vle32_v_i32m4,
+ __riscv_vsext_vf2_i64m8,
+ __riscv_vse64_v_i64m8,
+ vsext_vf,
+ LOOP_UNARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v4} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v8,v12} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
new file mode 100644
index 00000000000..4144306df4e
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e32m1,
+ vint32mf2_t,
+ vint64m1_t,
+ __riscv_vle32_v_i32mf2,
+ __riscv_vsext_vf2_i64m1,
+ __riscv_vse64_v_i64m1,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
new file mode 100644
index 00000000000..7a4ecd72d18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8m1_t,
+ vint16m2_t,
+ __riscv_vle8_v_i8m1,
+ __riscv_vsext_vf2_i16m2,
+ __riscv_vse16_v_i16m2,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
new file mode 100644
index 00000000000..318360f9374
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m2,
+ vint8m2_t,
+ vint16m4_t,
+ __riscv_vle8_v_i8m2,
+ __riscv_vsext_vf2_i16m4,
+ __riscv_vse16_v_i16m4,
+ vsext_vf,
+ LOOP_UNARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m4.c
new file mode 100644
index 00000000000..7617c01c376
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m4.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m4,
+ vint8m4_t,
+ vint16m8_t,
+ __riscv_vle8_v_i8m4,
+ __riscv_vsext_vf2_i16m8,
+ __riscv_vse16_v_i16m8,
+ vsext_vf,
+ LOOP_UNARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v4} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v8,v12} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
new file mode 100644
index 00000000000..fde319ec37a
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf2_t,
+ vint16m1_t,
+ __riscv_vle8_v_i8mf2,
+ __riscv_vsext_vf2_i16m1,
+ __riscv_vse16_v_i16m1,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
new file mode 100644
index 00000000000..1a1922abef4
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf4_t,
+ vint16mf2_t,
+ __riscv_vle8_v_i8mf4,
+ __riscv_vsext_vf2_i16mf2,
+ __riscv_vse16_v_i16mf2,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
new file mode 100644
index 00000000000..49b56468cc9
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_UNARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf8_t,
+ vint16mf4_t,
+ __riscv_vle8_v_i8mf8,
+ __riscv_vsext_vf2_i16mf4,
+ __riscv_vse16_v_i16mf4,
+ vsext_vf,
+ LOOP_UNARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v10,v11} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v12,v13} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v14,v15} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v16,v17} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v18,v19} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v20,v21} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v22,v23} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v24,v25} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v26,v27} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v28,v29} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v30,v31} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 568179d095e..9a3f05366e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -149,6 +149,8 @@ set AUTOVEC_TEST_OPTS [list \
foreach op $AUTOVEC_TEST_OPTS {
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/vx_vf/*.\[cS\]]]
\
"$op" ""
+ dg-runtest [lsort [glob -nocomplain
$srcdir/$subdir/autovec/group_overlap/*.\[cS\]]] \
+ "$op" ""
}
set POLICY [list {policy} {non-policy} ]
--
2.43.0
