On Thu, Jul 16, 2026 at 11:11:00AM +0530, Kishan Parmar wrote: > Hi All, > > The following patch has been bootstrapped and regtested on powerpc64le-linux. > > A future PowerPC processor may provide the Dense Math Facility (DMF), > where accumulators are backed by dedicated Dense Math Registers (DMRs). > Update accumulator assembly to build accumulators in DMRs using the new > DMR insert operations rather than xxmtacc/xxmfacc. > > Add DMR register predicate support, enable the required OOmode VSX pair > patterns under TARGET_DMF, use accumulator operands for MMA accumulator > assembly and disassembly, and avoid emitting xxmtacc/xxmfacc during > internal accumulator moves and GIMPLE folding when DMF is enabled. > Add DMF instruction type and ISA attributes for instruction scheduling > and enablement.
There are 2 minor changes that I would suggest. See below. > 2026-07-16 Kishan Parmar <[email protected]> > Peter Bergner <[email protected]> > > gcc/ChangeLog: > * config/rs6000/mma.md (UNSPEC_DMF_INSERT512): New unspec. > (UNSPEC_DMF_INSERT1024): Likewise. > (movoo): Enable for TARGET_DMF. > (*movoo): Likewise. > (vsx_assemble_pair): Likewise. > (*vsx_assemble_pair): Likewise. > (vsx_disassemble_pair): Likewise. > (*vsx_disassemble_pair): Likewise. > (dm_insert512): New insn. > (dm_insert1024): Likewise. > (mma_assemble_acc): Use accumulator_operand. > Build accumulators via DMR insert operations when TARGET_DMF. > (*mma_assemble_acc): Use accumulator_operand. > (mma_<acc>): New define_expand treating xxmtacc/xxmfacc as no-ops > for TARGET_DMF. > (*mma_<acc>): Restrict to !TARGET_DMF and use accumulator_operand. > (mma_disassemble_acc): Use accumulator_operand. > * config/rs6000/predicates.md (dmr_register_operand): New predicate. > (gpc_reg_operand): Accept DMR registers. > * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Do > not emit xxmfacc for DISASSEMBLE_ACC when TARGET_DMF. > * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow > OOmode in VSX register pairs for TARGET_DMF. > (rs6000_split_multireg_move): Avoid emitting xxmtacc/xxmfacc when > TARGET_DMF. > * config/rs6000/rs6000.md (type): Add dmf type. > (isa): Add mma and dmf ISA attributes. > (enabled): Add mma and dmf enable conditions. > > gcc/testsuite/ChangeLog: > * gcc.target/powerpc/future-dmf-xxacc.c: New test. > * gcc.target/powerpc/future-nodmf-xxacc.c: New test. As with other commits, please change the commit ChangeLog to be: 2026-07-16 Kishan Parmar <[email protected]> Peter Bergner <[email protected]> gcc/ * config/rs6000/mma.md (UNSPEC_DMF_INSERT512): New unspec. (UNSPEC_DMF_INSERT1024): Likewise. (movoo): Enable for TARGET_DMF. (*movoo): Likewise. (vsx_assemble_pair): Likewise. (*vsx_assemble_pair): Likewise. (vsx_disassemble_pair): Likewise. (*vsx_disassemble_pair): Likewise. (dm_insert512): New insn. (dm_insert1024): Likewise. (mma_assemble_acc): Use accumulator_operand. Build accumulators via DMR insert operations when TARGET_DMF. (*mma_assemble_acc): Use accumulator_operand. (mma_<acc>): New define_expand treating xxmtacc/xxmfacc as no-ops for TARGET_DMF. (*mma_<acc>): Restrict to !TARGET_DMF and use accumulator_operand. (mma_disassemble_acc): Use accumulator_operand. * config/rs6000/predicates.md (dmr_register_operand): New predicate. (gpc_reg_operand): Accept DMR registers. * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Do not emit xxmfacc for DISASSEMBLE_ACC when TARGET_DMF. * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow OOmode in VSX register pairs for TARGET_DMF. (rs6000_split_multireg_move): Avoid emitting xxmtacc/xxmfacc when TARGET_DMF. * config/rs6000/rs6000.md (type): Add dmf type. (isa): Add mma and dmf ISA attributes. (enabled): Add mma and dmf enable conditions. gcc/testsuite/ * gcc.target/powerpc/future-dmf-xxacc.c: New test. * gcc.target/powerpc/future-nodmf-xxacc.c: New test. I.e. remove 'ChangeLog:' and add a blank line. If you make these changes, you don't have to resubmit a patch, just make the changes before doing the commit. > @@ -295,7 +297,7 @@ (define_expand "movoo" > (define_insn_and_split "*movoo" > [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa") > (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))] > - "TARGET_MMA > + "(TARGET_MMA || TARGET_DMF) > && (gpc_reg_operand (operands[0], OOmode) > || gpc_reg_operand (operands[1], OOmode))" > "@ > @@ -363,7 +365,7 @@ (define_expand "vsx_assemble_pair" > [(match_operand:OO 0 "vsx_register_operand") > (match_operand:V16QI 1 "mma_assemble_input_operand") > (match_operand:V16QI 2 "mma_assemble_input_operand")] > - "TARGET_MMA" > + "TARGET_MMA || TARGET_DMF" > { > rtx src = gen_rtx_UNSPEC (OOmode, > gen_rtvec (2, operands[1], operands[2]), Please change the test from: "(TARGET_MMA || TARGET_DMF)" to: "TARGET_MMA || TARGET_DMF" > @@ -412,7 +414,7 @@ (define_insn_and_split "*vsx_disassemble_pair" > (unspec:V16QI [(match_operand:OO 1 "vsx_register_operand" "wa") > (match_operand 2 "const_0_to_1_operand")] > UNSPEC_MMA_EXTRACT))] > - "TARGET_MMA > + "(TARGET_MMA || TARGET_DMF) > && vsx_register_operand (operands[1], OOmode)" > "#" > "&& reload_completed" > @@ -425,19 +427,53 @@ (define_insn_and_split "*vsx_disassemble_pair" Likewise, change the test here as above. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: [email protected]
