> From: Kumar, Venkataramanan <[email protected]>
> Sent: Monday, July 20, 2026 3:37 AM
> > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> > index 058859e14c1..9a514161b3b 100644
> > --- a/gcc/config/i386/sse.md
> > +++ b/gcc/config/i386/sse.md
> > @@ -34548,3 +34555,60 @@
> > "TARGET_ACEV1"
> > "bsrmovl\t{%1, %0|%0, %1}"
> > [(set_attr "prefix" "evex")])
> > +
> > +(define_insn "tcvtrowd2ps"
> > + [(set (match_operand:V16SF 0 "register_operand" "=v")
> > + (unspec:V16SF
> > + [(reg:V32SI TMM_REGNUM)
> > + (match_operand:QI 1 "const_0_to_7_operand")
> > + (match_operand:SI 2 "nonmemory_operand" "rN")]
> > + UNSPEC_TCVTROWD2PS))]
> > + "TARGET_ACEV1"
> > + "tcvtrowd2ps\t{%2, %%tmm%c1, %0|%0, tmm%c1, %2}"
> > + [(set_attr "prefix" "evex")])
> > +
> > +(define_int_iterator UNSPEC_TCVTROWPS2FP16TYPE
> > + [UNSPEC_TCVTROWPS2FP16H UNSPEC_TCVTROWPS2FP16L])
> > +
> > +(define_int_attr highlowsuffix
> > + [(UNSPEC_TCVTROWPS2FP16H "h") (UNSPEC_TCVTROWPS2FP16L "l")])
> > +
> > +(define_insn "tcvtrowps2<bf16_ph><highlowsuffix>"
> > + [(set (match_operand:VHFBF_512 0 "register_operand" "=v")
> > + (unspec:VHFBF_512
> > + [(reg:V32SF TMM_REGNUM)
>
> Other places this was V32SI.
I use V32SF to indicate it is ps.
> > + (match_operand:QI 1 "const_0_to_7_operand")
> > + (match_operand:SI 2 "nonmemory_operand" "rN")]
> > + UNSPEC_TCVTROWPS2FP16TYPE))]
> > + "TARGET_ACEV1"
> > + "tcvtrowps2<bf16_ph><highlowsuffix>\t{%2, %%tmm%c1, %0|%0,
> tmm%c1,
> > %2}"
> > + [(set_attr "prefix" "evex")])
>
> Can we set mode here and other places??
Maybe we could, I did not set them to be conservative because they are
tile related and currently I am not sure what mode it should use.
Thx,
Haochen
