Remove *fix_trunc<mode>si_sse_zext and *fix_trunc<mode>si_sse_2_zext since they do not zero-extend SImode to DImode, as CVTTSD2SI does
IF 64-Bit Mode and OperandSize = 64 THEN DEST[63:0] := Convert_Double_Precision_Floating_Point_To_Integer_Truncate(SRC[63:0]); ELSE DEST[31:0] := Convert_Double_Precision_Floating_Point_To_Integer_Truncate(SRC[63:0]); FI; and CVTTSS2SI does IF 64-Bit Mode and OperandSize = 64 THEN DEST[63:0] := Convert_Single_Precision_Floating_Point_To_Integer_Truncate(SRC[31:0]); ELSE DEST[31:0] := Convert_Single_Precision_Floating_Point_To_Integer_Truncate(SRC[31:0]); FI; gcc/ PR target/127045 * config/i386/i386.md (*fix_trunc<mode>si_sse_zext): Removed. (*fix_trunc<mode>si_sse_2_zext): Likewise. gcc/testsuite/ PR target/127045 * gcc.target/i386/pr127045.c: New test. * gcc.target/i386/zext-sse-1.c (func1): Adjust expected codegen. (func2): Likewise. * gcc.target/i386/zext-sse-2.c (func1): Likewise. (func2): Likewise. -- H.J.
From 5de228532916e3185ca200773658e347404ca0c9 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" <[email protected]> Date: Tue, 25 Aug 2026 06:12:25 +0800 Subject: [PATCH] x86: Remove *fix_trunc<mode>si_sse_[2_]zext Remove *fix_trunc<mode>si_sse_zext and *fix_trunc<mode>si_sse_2_zext since they do not zero-extend SImode to DImode, as CVTTSD2SI does IF 64-Bit Mode and OperandSize = 64 THEN DEST[63:0] := Convert_Double_Precision_Floating_Point_To_Integer_Truncate(SRC[63:0]); ELSE DEST[31:0] := Convert_Double_Precision_Floating_Point_To_Integer_Truncate(SRC[63:0]); FI; and CVTTSS2SI does IF 64-Bit Mode and OperandSize = 64 THEN DEST[63:0] := Convert_Single_Precision_Floating_Point_To_Integer_Truncate(SRC[31:0]); ELSE DEST[31:0] := Convert_Single_Precision_Floating_Point_To_Integer_Truncate(SRC[31:0]); FI; gcc/ PR target/127045 * config/i386/i386.md (*fix_trunc<mode>si_sse_zext): Removed. (*fix_trunc<mode>si_sse_2_zext): Likewise. gcc/testsuite/ PR target/127045 * gcc.target/i386/pr127045.c: New test. * gcc.target/i386/zext-sse-1.c (func1): Adjust expected codegen. (func2): Likewise. * gcc.target/i386/zext-sse-2.c (func1): Likewise. (func2): Likewise. Signed-off-by: H.J. Lu <[email protected]> --- gcc/config/i386/i386.md | 33 -------------- gcc/testsuite/gcc.target/i386/pr127045.c | 53 ++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/zext-sse-1.c | 6 ++- gcc/testsuite/gcc.target/i386/zext-sse-2.c | 8 ++-- 4 files changed, 62 insertions(+), 38 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr127045.c diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a42a8cbcf13..5768a93d5b0 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6080,39 +6080,6 @@ (define_insn "fix_trunc<MODEF:mode><SWI48:mode>_sse" (set_attr "amdfam10_decode" "double,double") (set_attr "bdver1_decode" "double,double")]) -(define_insn "*fix_trunc<mode>si_sse_zext" - [(set (match_operand:DI 0 "register_operand" "=r,r") - (zero_extend:DI - (fix:SI (match_operand:MODEF 1 "nonimmediate_operand" "v,m"))))] - "TARGET_64BIT - && SSE_FLOAT_MODE_P (<MODE>mode) - && (!TARGET_FISTTP || TARGET_SSE_MATH)" - "%vcvtt<ssemodesuffix>2si{l}\t{%1, %k0|%k0, %1}" - [(set_attr "type" "sseicvt") - (set_attr "prefix" "maybe_vex") - (set_attr "prefix_rex" "*") - (set_attr "mode" "<MODE>") - (set_attr "athlon_decode" "double,vector") - (set_attr "amdfam10_decode" "double,double") - (set_attr "bdver1_decode" "double,double")]) - -(define_insn "*fix_trunc<mode>si_sse_2_zext" - [(set (match_operand:DI 0 "register_operand" "=r,r") - (zero_extend:DI - (subreg:SI - (fix:DI (match_operand:MODEF 1 "nonimmediate_operand" "v,m")) 0)))] - "TARGET_64BIT - && SSE_FLOAT_MODE_P (<MODE>mode) - && (!TARGET_FISTTP || TARGET_SSE_MATH)" - "%vcvtt<ssemodesuffix>2si{l}\t{%1, %k0|%k0, %1}" - [(set_attr "type" "sseicvt") - (set_attr "prefix" "maybe_vex") - (set_attr "prefix_rex" "*") - (set_attr "mode" "<MODE>") - (set_attr "athlon_decode" "double,vector") - (set_attr "amdfam10_decode" "double,double") - (set_attr "bdver1_decode" "double,double")]) - ;; Avoid vector decoded forms of the instruction. (define_peephole2 [(match_scratch:MODEF 2 "x") diff --git a/gcc/testsuite/gcc.target/i386/pr127045.c b/gcc/testsuite/gcc.target/i386/pr127045.c new file mode 100644 index 00000000000..cdb375b6ece --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr127045.c @@ -0,0 +1,53 @@ +/* { dg-do run { target { ! ia32 } } } */ +/* { dg-options "-O1" } */ + +float a; +long b, c; +int d, e, f, *g, *h, **i, **l, **m; +short n, o, p, q; +void +r (short s, short t) +{ + while (-32429 - (-28412 | t) > s) + ; +} +void +u (short s, int t, long v) +{ + h = &e; + i = &g; + l = &h; + m = &g; + if (v == 1073741824) + { + *i = &d; + *l = *m; + } + d = -1610809352 / t; + f = *h; + n = f; + o = n % 181 + 181; + p = 83; + q = 25 * o % 181; + p = p + q; + r (s - 16044, p + 28236); +} +void +w (float s) +{ + long j, k; + a = 8.0f * s; + b = 2.0f; + j = a; + j = j ^ b; + c = -4294967294 ^ j; + k = 2 ^ j; + c = c & k; + u (-16384, 24, 1073741824 ^ c); +} +int +main () +{ + w (536870912.0f); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/zext-sse-1.c b/gcc/testsuite/gcc.target/i386/zext-sse-1.c index 0965c89ddf4..1091c821ee4 100644 --- a/gcc/testsuite/gcc.target/i386/zext-sse-1.c +++ b/gcc/testsuite/gcc.target/i386/zext-sse-1.c @@ -10,7 +10,8 @@ **func1: **.LFB[0-9]+: ** .cfi_startproc -** cvttss2sil %xmm0, %eax +** cvttss2siq %xmm0, %rax +** movl %eax, %eax ** ret ** .cfi_endproc **... @@ -26,7 +27,8 @@ func1 (float x) **func2: **.LFB[0-9]+: ** .cfi_startproc -** cvttsd2sil %xmm0, %eax +** cvttsd2siq %xmm0, %rax +** movl %eax, %eax ** ret ** .cfi_endproc **... diff --git a/gcc/testsuite/gcc.target/i386/zext-sse-2.c b/gcc/testsuite/gcc.target/i386/zext-sse-2.c index 7d917cfd5de..5d26e686eb8 100644 --- a/gcc/testsuite/gcc.target/i386/zext-sse-2.c +++ b/gcc/testsuite/gcc.target/i386/zext-sse-2.c @@ -30,9 +30,10 @@ struct bar2 **.LFB[0-9]+: ** .cfi_startproc ** cvttsd2sil 16\(%rdi\), %ecx -** movupd \(%rdi\), %xmm1 -** cvttpd2dq %xmm1, %xmm0 -** movq %xmm0, %rax +** movupd \(%rdi\), %xmm0 +** cvttpd2dq %xmm0, %xmm1 +** movq %xmm1, %rax +** movl %ecx, %ecx ** movq %rcx, %rdx ** ret ** .cfi_endproc @@ -53,6 +54,7 @@ func1 (struct bar1 *x) ** movq \(%rdi\), %xmm0 ** cvttps2dq %xmm0, %xmm0 ** movq %xmm0, %rsi +** movl %eax, %eax ** movq %rax, %rdi ** movq %rsi, %rax ** movq %rdi, %rdx -- 2.55.0
