This patch adds new builtins for SHA3 instructions which may or may not
be supported in a future processor. The names of the builtins may
change. Also all sha related builtins are documented.

Core sha3 builtin:
void __builtin_dmsha3hash (__dmr2048*, uint5);

Extended mnemonics:
void __builtin_dmsha3dw (__dmr2048*);
void __builtin_dmcryshash (__dmr2048*);

2026-08-27  Avinash Jayakar  <[email protected]>

gcc/ChangeLog:
        * config/rs6000/crypto.md (UNSPEC_DMSHA3HASH): New unspec entry.
        (UNSPEC_DMSHA3DW): Likewise.
        (UNSPEC_DMCRYSHASH): Likewise.
        (SHA3_code): Iterator for sha3 extended mnemonics.
        (SHA3_insn): Attribute for sha3 extended mnemonics.
        (<SHA3_insn>): New define_insn for sha3 extended mnemonics.
        * config/rs6000/rs6000-builtins.def: Add new builtin definitions.
        * doc/extend.texi: Document all new sha related builtins.

gcc/testsuite/ChangeLog:
        * gcc.target/powerpc/sha-builtins-5.c: New test.
---
 gcc/config/rs6000/crypto.md                   | 24 ++++++++++++
 gcc/config/rs6000/rs6000-builtins.def         | 18 +++++++++
 gcc/doc/extend.texi                           | 38 +++++++++++++++++++
 .../gcc.target/powerpc/sha-builtins-5.c       | 28 ++++++++++++++
 4 files changed, 108 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/sha-builtins-5.c

diff --git a/gcc/config/rs6000/crypto.md b/gcc/config/rs6000/crypto.md
index ea9daf60597..aa0752f49e1 100644
--- a/gcc/config/rs6000/crypto.md
+++ b/gcc/config/rs6000/crypto.md
@@ -60,6 +60,9 @@ (define_c_enum "unspec"
    UNSPEC_DMXXSHAKE128PAD
    UNSPEC_DMXXSHA384512PAD
    UNSPEC_DMXXSHA224256PAD
+   UNSPEC_DMSHA3HASH
+   UNSPEC_DMSHA3DW
+   UNSPEC_DMCRYSHASH
    UNSPEC_XXGFMUL128
    UNSPEC_XXGFMUL128GCM
    UNSPEC_XXGFMUL128XTS])
@@ -101,6 +104,12 @@ (define_int_iterator SHA2_code [UNSPEC_DMSHA256HASH
 (define_int_attr SHA2_insn [(UNSPEC_DMSHA256HASH "dmsha256hash")
                            (UNSPEC_DMSHA512HASH "dmsha512hash")])
 
+;; Iterator and attribute for SHA3 extended mnemonics
+(define_int_iterator SHA3_code [UNSPEC_DMSHA3DW
+                               UNSPEC_DMCRYSHASH])
+(define_int_attr SHA3_insn [(UNSPEC_DMSHA3DW "dmsha3dw")
+                           (UNSPEC_DMCRYSHASH "dmcryshash")])
+
 ;; Iterator and attribute for SHAPAD extended mnemonics
 (define_int_iterator SHAPAD_code [UNSPEC_DMXXSHA3512PAD
                          UNSPEC_DMXXSHA3384PAD
@@ -293,3 +302,18 @@ (define_insn "<SHA2PAD_insn>"
                SHA2PAD_code))]
   "TARGET_FUTURE"
   "<SHA2PAD_insn> %0,%2")
+
+(define_insn "dmsha3hash"
+  [(set (match_operand:QDO 0 "dmr_register_operand" "=wD")
+    (unspec:QDO [(match_operand:QDO 1 "dmr_register_operand" "0")
+                (match_operand:SI 2 "u5bit_cint_operand" "n")]
+               UNSPEC_DMSHA3HASH))]
+  "TARGET_FUTURE"
+  "dmsha3hash %0,%2")
+
+(define_insn "<SHA3_insn>"
+  [(set (match_operand:QDO 0 "dmr_register_operand" "=wD")
+    (unspec:QDO [(match_operand:QDO 1 "dmr_register_operand" "0")]
+               SHA3_code))]
+  "TARGET_FUTURE"
+  "<SHA3_insn> %0")
diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 1be92fda977..ca3bdd8a579 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4385,3 +4385,21 @@
 
   dmr1024 __builtin_dmxxsha224256pad_internal (dmr1024, vuc);
     DMXXSHA224256PAD_INTERNAL dmxxsha224256pad {dm}
+
+  void __builtin_dmsha3hash (dmr2048 *, const int<5>);
+    DMSHA3HASH nothing {dm,dmint,dmr}
+
+  dmr2048 __builtin_dmsha3hash_internal (dmr2048, const int<5>);
+    DMSHA3HASH_INTERNAL dmsha3hash {dm}
+
+  void __builtin_dmsha3dw (dmr2048 *);
+    DMSHA3DW nothing {dm,dmint,dmr}
+
+  dmr2048 __builtin_dmsha3dw_internal (dmr2048);
+    DMSHA3DW_INTERNAL dmsha3dw {dm}
+
+  void __builtin_dmcryshash (dmr2048 *);
+    DMCRYSHASH nothing {dm,dmint,dmr}
+
+  dmr2048 __builtin_dmcryshash_internal (dmr2048);
+    DMCRYSHASH_INTERNAL dmcryshash {dm}
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 69034686a41..a06614ac322 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -27180,6 +27180,44 @@ vec_t __builtin_galois_field_mult_gcm (vec_t, vec_t);
 vec_t __builtin_galois_field_mult_xts (vec_t, vec_t);
 @end smallexample
 
+@subsubheading PowerPC Secure Hash Algorithm (SHA) Acceleration Built-in 
Functions
+
+Future ISA of the PowerPC may add new instructions for accelerating SHA
+hash function. GCC provides support for these new instructions through the
+following built-in functions.
+
+@smallexample
+void __builtin_dmsha2hash (__dmr1024*, __dmr1024*, uint1);
+
+void __builtin_dmxxshapad (__dmr1024*, vec_t, uint2, uint1, uint2);
+
+void __builtin_dmsha256hash (__dmr1024*, __dmr1024*);
+
+void __builtin_dmsha512hash (__dmr1024*, __dmr1024*);
+
+void __builtin_dmxxsha3512pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxsha3384pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxsha3256pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxsha3224pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxshake256pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxshake128pad (__dmr1024*, vec_t, uint1);
+
+void __builtin_dmxxsha384512pad (__dmr1024*, vec_t);
+
+void __builtin_dmxxsha224256pad (__dmr1024*, vec_t);
+
+void __builtin_dmsha3hash (__dmr2048*, uint5);
+
+void __builtin_dmsha3dw (__dmr2048*);
+
+void __builtin_dmcryshash (__dmr2048*);
+@end smallexample
+
 @subsubheading PowerPC Vector Integer Multiply High Built-in Functions
 
 Future PowerPC processors may add new instructions for vector integer
diff --git a/gcc/testsuite/gcc.target/powerpc/sha-builtins-5.c 
b/gcc/testsuite/gcc.target/powerpc/sha-builtins-5.c
new file mode 100644
index 00000000000..9a331d9798c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sha-builtins-5.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_future_compile_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+void sha3hash (__dmr2048* dst)
+{
+  __builtin_dmsha3hash (dst, 31);
+}
+
+void sha3dw (__dmr2048* dst)
+{
+  __builtin_dmsha3dw (dst);
+}
+
+void cryshash (__dmr2048* dst)
+{
+  __builtin_dmcryshash (dst);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M} 24 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M} 24 } } */
+/* { dg-final { scan-assembler-times {\mdmxxinstdmr512\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mdmxxextfdmr512\M} 12 } } */
+
+/* { dg-final { scan-assembler-times {\mdmsha3hash\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mdmsha3dw\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mdmcryshash\M} 1 } } */
-- 
2.54.0

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