On 09/09/26 1:06 PM, Avinash Jayakar wrote:

>> We should also emit the line number and other location information.
>>
> The location structure is not available with this target hook. I think
> by default the error function emits that. All other places where error
> is emitted in this function also just emit the error directly for
> example in the checking whether parameter is a constant or not
> 
>           if (!(TREE_CODE (restr_arg) == INTEGER_CST
>                 && (TREE_INT_CST_LOW (restr_arg) & ~mask) == 0))
>             {
>               unsigned p = (1U << bifaddr->restr_val1[i]) - 1;
>               error ("argument %d must be a literal between 0 and
> %d,"
>                      " inclusive",
>                      bifaddr->restr_opnd[i], p);
>               return const0_rtx;
>             }
> 
> Currently it just emits error at the function declaration line. This is
> true not just for this error but any other type of error. Another way I
> see is to implement TARGET_CHECK_BUILTIN_CALL for rs6000 which is meant
> to do a semantic checking and has the location information as well. But
> this may require a significant refactor, as I see lot of error checking
> is done in TARGET_EXPAND_BUILTIN hook itself.
> Another issue I see with current approach is that the checks are done
> after TARGET_GIMPLE_FOLD_BUILTIN which converts the builtins to
> internal version if they have that. So in the error message we end up
> reporting the internal name instead of the actual function that user
> used.
> Maybe we can take it up as a separate issue?

Ok, this can be a separate issue.

-Surya

> 
> 
> Thanks,
> Avinash
> 
>> - Surya
>>
>>>>> +       return const0_rtx;
>>>>> +     }
>>>>> + }
>>>>> +    }
>>>>> +
>>>>> +
>>>>>    if (fcode == RS6000_BIF_PPC_ATOMIC_CAS_QI
>>>>>        || fcode == RS6000_BIF_PPC_ATOMIC_CAS_HI
>>>>>        || fcode == RS6000_BIF_PPC_ATOMIC_CAS_SI
>>>>> diff --git a/gcc/config/rs6000/rs6000-builtins.def
>>>>> b/gcc/config/rs6000/rs6000-builtins.def
>>>>> index 4b7d21cdb81..1be92fda977 100644
>>>>> --- a/gcc/config/rs6000/rs6000-builtins.def
>>>>> +++ b/gcc/config/rs6000/rs6000-builtins.def
>>>>> @@ -4313,3 +4313,75 @@
>>>>>    dmr1024 __builtin_mma_pmdmxvf16gerx2nn_internal (dmr1024,
>>>>> v256,
>>>>> vuc, const int<8>, \
>>>>>                                            const int<4>,
>>>>> const int<2>);
>>>>>      PMDMXVF16GERX2NN_INTERNAL dmf_pmdmxvf16gerx2nn {dm,pair}
>>>>> +
>>>>> +  void __builtin_dmsha2hash (dmr1024 *, dmr1024 *, const
>>>>> int<1>);
>>>>> +    DMSHA2HASH nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmsha2hash_internal (dmr1024, dmr1024,
>>>>> const
>>>>> int<1>);
>>>>> +    DMSHA2HASH_INTERNAL dmsha2hash {dm}
>>>>> +
>>>>> +  void __builtin_dmsha256hash (dmr1024 *, dmr1024 *);
>>>>> +    DMSHA256HASH nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmsha256hash_internal (dmr1024, dmr1024);
>>>>> +    DMSHA256HASH_INTERNAL dmsha256hash {dm}
>>>>> +
>>>>> +  void __builtin_dmsha512hash (dmr1024 *, dmr1024 *);
>>>>> +    DMSHA512HASH nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmsha512hash_internal (dmr1024, dmr1024);
>>>>> +    DMSHA512HASH_INTERNAL dmsha512hash {dm}
>>>>> +
>>>>> +  void __builtin_dmxxshapad (dmr1024 *, vuc, const int<2>,
>>>>> const
>>>>> int<1>, const int<2>);
>>>>> +    DMXXSHAPAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxshapad_internal (dmr1024, vuc, const
>>>>> int<2>, const int<1>, const int<2>);
>>>>> +    DMXXSHAPAD_INTERNAL dmxxshapad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha3512pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHA3512PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha3512pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHA3512PAD_INTERNAL dmxxsha3512pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha3384pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHA3384PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha3384pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHA3384PAD_INTERNAL dmxxsha3384pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha3256pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHA3256PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha3256pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHA3256PAD_INTERNAL dmxxsha3256pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha3224pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHA3224PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha3224pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHA3224PAD_INTERNAL dmxxsha3224pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxshake256pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHAKE256PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxshake256pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHAKE256PAD_INTERNAL dmxxshake256pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxshake128pad (dmr1024 *, vuc, const
>>>>> int<1>);
>>>>> +    DMXXSHAKE128PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxshake128pad_internal (dmr1024, vuc,
>>>>> const
>>>>> int<1>);
>>>>> +    DMXXSHAKE128PAD_INTERNAL dmxxshake128pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha384512pad (dmr1024 *, vuc);
>>>>> +    DMXXSHA384512PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha384512pad_internal (dmr1024, vuc);
>>>>> +    DMXXSHA384512PAD_INTERNAL dmxxsha384512pad {dm}
>>>>> +
>>>>> +  void __builtin_dmxxsha224256pad (dmr1024 *, vuc);
>>>>> +    DMXXSHA224256PAD nothing {dm,dmint,dmr}
>>>>> +
>>>>> +  dmr1024 __builtin_dmxxsha224256pad_internal (dmr1024, vuc);
>>>>> +    DMXXSHA224256PAD_INTERNAL dmxxsha224256pad {dm}
>>>>> diff --git a/gcc/testsuite/gcc.target/powerpc/sha-builtins-1.c
>>>>> b/gcc/testsuite/gcc.target/powerpc/sha-builtins-1.c
>>>>> new file mode 100644
>>>>> index 00000000000..b5de0316b40
>>>>> --- /dev/null
>>>>> +++ b/gcc/testsuite/gcc.target/powerpc/sha-builtins-1.c
>>>>> @@ -0,0 +1,42 @@
>>>>> +/* { dg-do compile } */
>>>>> +/* { dg-require-effective-target powerpc_future_compile_ok }
>>>>> */
>>>>> +/* { dg-require-effective-target lp64 } */
>>>>> +/* { dg-options "-mdejagnu-cpu=future -O2" } */
>>>>> +
>>>>> +void
>>>>> +sha2hash_256 (__dmr1024 *dst, __dmr1024 *src)
>>>>> +{
>>>>> +  __builtin_dmsha2hash (dst, src, 0);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +sha2hash_512 (__dmr1024 *dst, __dmr1024 *src)
>>>>> +{
>>>>> +  __builtin_dmsha2hash (dst, src, 1);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +sha256hash (__dmr1024 *dst, __dmr1024 *src)
>>>>> +{
>>>>> +  __builtin_dmsha256hash (dst, src);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +sha512hash (__dmr1024 *dst, __dmr1024 *src)
>>>>> +{
>>>>> +  __builtin_dmsha512hash (dst, src);
>>>>> +}
>>>>> +
>>>>> +/* Each function loads both dmrs first so the dst is not
>>>>> clobbered
>>>>> therefore
>>>>> +   we have 8 lxvp for each function.  */
>>>>> +/* { dg-final { scan-assembler-times {\mlxvp\M} 32 } } */
>>>>> +
>>>>> +/* Each function stores only one dmr into dst.  */
>>>>> +/* { dg-final { scan-assembler-times {\mstxvp\M} 16 } } */
>>>>> +
>>>>> +/* { dg-final { scan-assembler-times {\mdmsha2hash\M} 2 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmsha2hash\M\s+[^,\n]+,\s*[^,\n]+,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmsha2hash\M\s+[^,\n]+,\s*[^,\n]+,\s*1\M} 1 } } */
>>>>> +
>>>>> +/* { dg-final { scan-assembler-times {\mdmsha256hash\M} 1 } }
>>>>> */
>>>>> +/* { dg-final { scan-assembler-times {\mdmsha512hash\M} 1 } }
>>>>> */
>>>>> diff --git a/gcc/testsuite/gcc.target/powerpc/sha-builtins-2.c
>>>>> b/gcc/testsuite/gcc.target/powerpc/sha-builtins-2.c
>>>>> new file mode 100644
>>>>> index 00000000000..9007cdeb95e
>>>>> --- /dev/null
>>>>> +++ b/gcc/testsuite/gcc.target/powerpc/sha-builtins-2.c
>>>>> @@ -0,0 +1,82 @@
>>>>> +/* { dg-do compile } */
>>>>> +/* { dg-require-effective-target powerpc_future_compile_ok }
>>>>> */
>>>>> +/* { dg-require-effective-target lp64 } */
>>>>> +/* { dg-options "-mdejagnu-cpu=future -O2" } */
>>>>> +
>>>>> +typedef unsigned char vec_t __attribute__((vector_size(16)));
>>>>> +
>>>>> +#define SHAPAD_FN(ID, E, BL)                            \
>>>>> +void shapad_##ID##_##E##_##BL(__dmr1024 *res, vec_t pd) \
>>>>> +{                                                       \
>>>>> +  __builtin_dmxxshapad(res, pd, ID, E, BL);             \
>>>>> +}
>>>>
>>>> I have given similar review comments for other patches: let us
>>>> not
>>>> use macros in testcases.
>>>>
>>>> -Surya
>>>
>>> Ok. It was a bit easier to add/iterate over the testing written
>>> this
>>> way. I missed to expand them in final patch. Will address other
>>> comments in the next version. Thanks for the review.
>>>
>>> Regards,
>>> Avinash
>>>
>>>>
>>>>> +
>>>>> +/* All combinations: ID = 0..3, E = 0..1, BL = 0..3 */
>>>>> +SHAPAD_FN(0, 0, 0)
>>>>> +SHAPAD_FN(0, 0, 1)
>>>>> +SHAPAD_FN(0, 0, 2)
>>>>> +SHAPAD_FN(0, 0, 3)
>>>>> +SHAPAD_FN(0, 1, 0)
>>>>> +SHAPAD_FN(0, 1, 1)
>>>>> +SHAPAD_FN(0, 1, 2)
>>>>> +SHAPAD_FN(0, 1, 3)
>>>>> +
>>>>> +SHAPAD_FN(1, 0, 2)
>>>>> +SHAPAD_FN(1, 0, 3)
>>>>> +SHAPAD_FN(1, 1, 2)
>>>>> +SHAPAD_FN(1, 1, 3)
>>>>> +
>>>>> +SHAPAD_FN(2, 0, 0)
>>>>> +SHAPAD_FN(2, 0, 1)
>>>>> +SHAPAD_FN(2, 0, 2)
>>>>> +SHAPAD_FN(2, 0, 3)
>>>>> +SHAPAD_FN(2, 1, 0)
>>>>> +SHAPAD_FN(2, 1, 1)
>>>>> +SHAPAD_FN(2, 1, 2)
>>>>> +SHAPAD_FN(2, 1, 3)
>>>>> +
>>>>> +SHAPAD_FN(3, 0, 0)
>>>>> +SHAPAD_FN(3, 0, 1)
>>>>> +SHAPAD_FN(3, 0, 2)
>>>>> +SHAPAD_FN(3, 0, 3)
>>>>> +SHAPAD_FN(3, 1, 0)
>>>>> +SHAPAD_FN(3, 1, 1)
>>>>> +SHAPAD_FN(3, 1, 2)
>>>>> +SHAPAD_FN(3, 1, 3)
>>>>> +
>>>>> +/* Each function loads dst dmrs first so the dst is not
>>>>> clobbered,
>>>>> therefore
>>>>> +   we have 4 lxvp for each function.  */
>>>>> +/* { dg-final { scan-assembler-times {\mlxvp\M} 112 } } */
>>>>> +
>>>>> +/* Each function stores only one dmr into dst.  */
>>>>> +/* { dg-final { scan-assembler-times {\mstxvp\M} 112 } } */
>>>>> +
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxshapad\M} 28 } }
>>>>> */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*0,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*0,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*0,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*0,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*1,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*1,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*1,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*0,\s*1,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*1,\s*0,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*1,\s*0,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*1,\s*1,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*1,\s*1,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*0,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*0,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*0,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*0,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*1,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*1,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*1,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*2,\s*1,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*0,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*0,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*0,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*0,\s*3\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*1,\s*0\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*1,\s*1\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*1,\s*2\M} 1 } } */
>>>>> +/* { dg-final { scan-assembler-times
>>>>> {\mdmxxshapad\M\s+[^,\n]+,\s*[^,\n],\s*3,\s*1,\s*3\M} 1 } } */
>>>>> diff --git a/gcc/testsuite/gcc.target/powerpc/sha-builtins-3.c
>>>>> b/gcc/testsuite/gcc.target/powerpc/sha-builtins-3.c
>>>>> new file mode 100644
>>>>> index 00000000000..4551af8ef14
>>>>> --- /dev/null
>>>>> +++ b/gcc/testsuite/gcc.target/powerpc/sha-builtins-3.c
>>>>> @@ -0,0 +1,33 @@
>>>>> +/* { dg-do compile } */
>>>>> +/* { dg-require-effective-target powerpc_future_compile_ok }
>>>>> */
>>>>> +/* { dg-require-effective-target lp64 } */
>>>>> +/* { dg-options "-mdejagnu-cpu=future -O2" } */
>>>>> +
>>>>> +typedef unsigned char vec_t __attribute__((vector_size(16)));
>>>>> +
>>>>> +void
>>>>> +shapad_1_0_0(__dmr1024 *res, vec_t pd) /* { dg-error "Invalid
>>>>> combination" } */
>>>>> +{
>>>>> +    __builtin_dmxxshapad(res, pd, 1, 0, 0);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +shapad_1_0_1(__dmr1024 *res, vec_t pd) /* { dg-error "Invalid
>>>>> combination" } */
>>>>> +{
>>>>> +  __builtin_dmxxshapad(res, pd, 1, 0, 1);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +shapad_1_1_0(__dmr1024 *res, vec_t pd) /* { dg-error "Invalid
>>>>> combination" } */
>>>>> +{
>>>>> +  __builtin_dmxxshapad(res, pd, 1, 1, 0);
>>>>> +}
>>>>> +
>>>>> +void
>>>>> +shapad_1_1_1(__dmr1024 *res, vec_t pd) /* { dg-error "Invalid
>>>>> combination" } */
>>>>> +{
>>>>> +  __builtin_dmxxshapad(res, pd, 1, 1, 1);
>>>>> +}
>>>>> +
>>>>> +// There are other error messages emitted in expand phase.
>>>>> Ignore
>>>>> them.
>>>>> +/* { dg-excess-errors "" } */
>>>>> diff --git a/gcc/testsuite/gcc.target/powerpc/sha-builtins-4.c
>>>>> b/gcc/testsuite/gcc.target/powerpc/sha-builtins-4.c
>>>>> new file mode 100644
>>>>> index 00000000000..edbd0ef836c
>>>>> --- /dev/null
>>>>> +++ b/gcc/testsuite/gcc.target/powerpc/sha-builtins-4.c
>>>>> @@ -0,0 +1,55 @@
>>>>> +/* { dg-do compile } */
>>>>> +/* { dg-require-effective-target powerpc_future_compile_ok }
>>>>> */
>>>>> +/* { dg-require-effective-target lp64 } */
>>>>> +/* { dg-options "-mdejagnu-cpu=future -O2" } */
>>>>> +
>>>>> +typedef unsigned char vec_t __attribute__((vector_size(16)));
>>>>> +
>>>>> +void sha3512pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha3512pad (dst, pd, 0);
>>>>> +}
>>>>> +void sha3384pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha3384pad (dst, pd, 0);
>>>>> +}
>>>>> +void sha3256pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha3256pad (dst, pd, 0);
>>>>> +}
>>>>> +void sha3224pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha3224pad (dst, pd, 0);
>>>>> +}
>>>>> +void shake256pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxshake256pad (dst, pd, 0);
>>>>> +}
>>>>> +void shake128pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxshake128pad (dst, pd, 0);
>>>>> +}
>>>>> +void sha384512pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha384512pad (dst, pd);
>>>>> +}
>>>>> +void sha224256pad (__dmr1024* dst, vec_t pd)
>>>>> +{
>>>>> +  __builtin_dmxxsha224256pad (dst, pd);
>>>>> +}
>>>>> +
>>>>> +/* Each function loads dst dmrs first so the dst is not
>>>>> clobbered,
>>>>> therefore
>>>>> +   we have 4 lxvp for each function.  */
>>>>> +/* { dg-final { scan-assembler-times {\mlxvp\M} 32 } } */
>>>>> +
>>>>> +/* Each function stores only one dmr into dst.  */
>>>>> +/* { dg-final { scan-assembler-times {\mstxvp\M} 32 } } */
>>>>> +
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha3512pad\M} 1 }
>>>>> } */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha3384pad\M} 1 }
>>>>> } */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha3256pad\M} 1 }
>>>>> } */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha3224pad\M} 1 }
>>>>> } */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxshake256pad\M} 1 }
>>>>> }
>>>>> */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxshake128pad\M} 1 }
>>>>> }
>>>>> */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha384512pad\M} 1
>>>>> } }
>>>>> */
>>>>> +/* { dg-final { scan-assembler-times {\mdmxxsha224256pad\M} 1
>>>>> } }
>>>>> */

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