> The series is OK. Just for the record: the tests are still LLM assisted > (which is fine) from what it looks like?
For test yes. Mostly I will prepare the group_overlap.h first, and then write a example like vwmaccu_vx-u16-m1.c. After that, I will ask the LLM to generate the rest combination of test cases based on the example like vwmaccu_vx-u16-m1.c, aka from u8 to u16 plus from mf8 to m4. Then I will go thru those generated files, specially for the asm check and then run the local regression test before send it out. Pan -----Original Message----- From: Robin Dapp <[email protected]> Sent: Thursday, August 27, 2026 6:56 PM To: Li, Pan2 <[email protected]>; [email protected] Cc: [email protected]; [email protected]; [email protected]; [email protected]; Chen, Ken <[email protected]>; Liu, Hongtao <[email protected]> Subject: Re: [PATCH v1 1/4] RISC-V: Allow RVV register overlap for vwmacc[u].vx > From: Pan Li <[email protected]> > > Like vwmacc[u].vv, allow the rvv register overlap for the dual > widen ternary vx insn vwmacc.vx and vwmaccu.vx. The series is OK. Just for the record: the tests are still LLM assisted (which is fine) from what it looks like? -- Regards Robin
