Two rounding right shifts that GCC only ever emits for the ACLE
intrinsics, and the C spellings that should reach them.
1/2 adds source-width companions for RSHRN/RSHRN2. C does the rounding
add and the shift at the source width, while the existing recognisers
want the intrinsic shape, in <V2XWIDE> over an extended operand. The
two spellings agree for every shift the predicates allow; the saturating
members of the family do not, and are left out. As a side effect
vrshrn_n_* at a shift equal to the destination element width now emits
one rshrn instead of movi + raddhn, so four advsimd-intrinsics tests
change from the raddhn sequence to the shorter rshrn one.
2/2 is a machine-description fix rather than a new pattern.
aarch64_<sra_op>rshr_n<mode>_insn and aarch64_<sra_op>rsra_n<mode>_insn
put the shift amount of a <V2XWIDE> shift in <MODE>, which is RTL only
their own expanders build, so nothing else can match them. Both move to
<V2XWIDE> together, because combine pairs them.
2/2 applies on top of 1/2.
Cross-tested aarch64-linux-gnu under qemu-aarch64 (aarch64.exp, simd.exp,
advsimd-intrinsics.exp, vect.exp, like for like against the same tree
unpatched) and bootstrapped on x86_64-pc-linux-gnu.
Dominic P (2):
aarch64: Match a rounding narrowing shift written at the source width
aarch64: Make the rounding shift-right pair reachable from generic
code
gcc/config/aarch64/aarch64-simd.md | 56 ++++++++-
.../aarch64/advsimd-intrinsics/shrn-1.c | 6 +-
.../aarch64/advsimd-intrinsics/shrn-2.c | 5 +-
.../aarch64/advsimd-intrinsics/shrn-3.c | 5 +-
.../aarch64/advsimd-intrinsics/shrn-4.c | 5 +-
.../gcc.target/aarch64/simd_rshrn_1.c | 106 ++++++++++++++++++
.../gcc.target/aarch64/simd_rshrn_2.c | 64 +++++++++++
.../gcc.target/aarch64/simd_srshr_1.c | 90 +++++++++++++++
.../gcc.target/aarch64/simd_srshr_2.c | 62 ++++++++++
9 files changed, 386 insertions(+), 13 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/simd_rshrn_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/simd_rshrn_2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/simd_srshr_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/simd_srshr_2.c
--
2.55.0
