Hi Dominic,
+(define_insn "smmulsi3"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (truncate:SI
+ (lshiftrt:DI
+ (mult:DI
+ (sign_extend:DI (match_operand:SI 1 "s_register_operand"
"%r"))
+ (sign_extend:DI (match_operand:SI 2 "s_register_operand"
"r")))
+ (const_int 32))))]
+ "TARGET_INT_SIMD"
+ "smmul%?\\t%0, %1, %2"
+ [(set_attr "type" "smmul")
+ (set_attr "predicable" "yes")]
+)
This could be written using the SMUL_HIGHPART rtx code as:
(define_insn "smmulsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(smul_highpart:SI
(match_operand:SI 1 "s_register_operand" "%r"))
(match_operand:SI 2 "s_register_operand" "r")))]
"TARGET_INT_SIMD"
"smmul%?\\t%0, %1, %2"
[(set_attr "type" "smmul")
(set_attr "predicable" "yes")]
)
Just a suggestion [I'm no longer a reviewer/maintainer].
Roger
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