On 9/14/26 9:26 AM, Stefan Schulze Frielinghaus wrote:
From: Stefan Schulze Frielinghaus<[email protected]>
Treat a hard register constraint the same way as a constraint associated
a single register class for process_single_reg_class_operands().
---
This patch makes gcc.dg/asm-hard-reg-6.c fail on s390 where we have for
function test_reg_reg:
(insn 10 4 11 2 (set (reg:DI 62 [ x+-4 ])
(reg:DI 2 %r2 [ x+-4 ])) "asm-hard-reg-6.c":54:1 1909 {*movdi_64}
(expr_list:REG_DEAD (reg:DI 2 %r2 [ x+-4 ])
(nil)))
(insn 11 10 7 2 (set (reg/f:DI 63 [ y ])
(reg:DI 3 %r3 [ y ])) "asm-hard-reg-6.c":54:1 1909 {*movdi_64}
(expr_list:REG_DEAD (reg:DI 3 %r3 [ y ])
(nil)))
(insn 7 11 12 2 (asm_operands/v ("foo %0,%1") ("") 0 [
(subreg/s/u:SI (reg:DI 62 [ x+-4 ]) 4)
(reg/f:DI 63 [ y ])
]
[
(asm_input:SI ("{r0}m,{r1}") asm-hard-reg-6.c:55)
(asm_input:DI ("{r2},m") asm-hard-reg-6.c:55)
]
[] asm-hard-reg-6.c:55) "asm-hard-reg-6.c":55:3 -1
(expr_list:REG_DEAD (reg/f:DI 63 [ y ])
(expr_list:REG_DEAD (reg:DI 62 [ x+-4 ])
(nil))))
Previously, during IRA we assigned to pseudo r62 hard register r2 and to pseudo
r63 hard register r3 which we derived from the hard register assignments as
preferred registers. During LRA we then decide to go for alternative 0 due to
costing:
Considering alt=0 of insn 7: (0) {r0}m (1) {r2}
0 Operand reload: losers++
1 Operand reload: losers++
overall=12,losers=2,rld_nregs=2
Considering alt=1 of insn 7: (0) {r1} (1) m
0 Operand reload: losers++
1 Operand reload: losers++
1 Spill pseudo into memory: reject+=3
Using memory insn operand 1: reject+=3
overall=18,losers=2 -- refuse
Choosing alt 0 in insn 7: (0) {r0}m (1) {r2}
Note, in both alternatives we require two reloads. This changes with this
patch where we assign during IRA to pseudo r62 hard register r1 and to pseudo
as before hard register r3. We chose for pseudo r62 hard register r1 since
during process_single_reg_class_operands we have preferred alternative 0 only
which in turn means that we assume for pseudo r63 a single reg class operand,
now, which in turn renders r2 a conflicting hard register for pseudo r62:
;; a0(r62,l0) conflicts: a1(r63,l0)
;; total conflict hard regs: 2-3 14
;; conflict hard regs: 2-3 14
;; a1(r63,l0) conflicts: a0(r62,l0)
;; total conflict hard regs: 14
;; conflict hard regs: 14
Previously we had r2 non-conflicting for r62:
;; a0(r62,l0) conflicts: a1(r63,l0)
;; total conflict hard regs: 3 14
;; conflict hard regs: 3 14
;; a1(r63,l0) conflicts: a0(r62,l0)
;; total conflict hard regs: 14
;; conflict hard regs: 14
So now we are lucky (or unlucky depending on how you want to approach this) and
choose r1 for r62 which is the correct hard register for alternative 1 and
thus
we only need one reload for this alternative which means in the end both
alternatives have the same cost:
Considering alt=0 of insn 7: (0) {r0}m (1) {r2}
0 Operand reload: losers++
1 Operand reload: losers++
overall=12,losers=2,rld_nregs=2
Considering alt=1 of insn 7: (0) {r1} (1) m
1 Operand reload: losers++
1 Spill pseudo into memory: reject+=3
Using memory insn operand 1: reject+=3
overall=12,losers=1,rld_nregs=0
Choosing alt 1 in insn 7: (0) {r1} (1) m
which is why we choose a different alternative, now, rendering the test
failing. I'm inclined to restore the previous behaviour where we had two
reloads in both cases by changing GPR3 to r4 for the test.
Independent of the test case engineering part I think this patch moves hard
register constraints to the right direction and aligning with single register
class constraints is correct.
Bootstrapped and regtested on
- aarch64-unknown-linux-gnu
- powerpc64le-unknown-linux-gnu
- s390x-ibm-linux-gnu
- x86_64-pc-linux-gnu
Ok for mainline?
The names of single_reg_class and single_reg_operand_class do not
reflect accurately the return value (type) anymore. I'd simply add
suffix _regno for the both names.
With this small change, you can commit the patch.
Thank you for continuing your work on hard reg constraints.
gcc/ira-lives.cc | 77 +++++++++++--------
gcc/testsuite/gcc.dg/asm-hard-reg-6.c | 4 +-
.../gcc.target/s390/asm-hard-reg-1.c | 4 +-
3 files changed, 50 insertions(+), 35 deletions(-)
