[PATCH v1 5/5] RISC-V: Remove xfail of the vfwadd.vf reg overlap test case

[pan2 . li]

From: Pan Li <pan2...@intel.com>

Remove the xfail of the csrr check after the rvv register overlap
of vfwadd.vf is allowed.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/base/pr112431-25.c: Remove the xfail
        of the csrr check.
        * gcc.target/riscv/rvv/base/pr112431-26.c: Ditto.
        * gcc.target/riscv/rvv/base/pr112431-27.c: Ditto.

Signed-off-by: Pan Li <pan2...@intel.com>
---
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-26.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-27.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c
index 57a8ef28486..0b52b9f24eb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-25.c
@@ -101,4 +101,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-26.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-26.c
index 0f05e2b2e1d..d21a73765ed 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-26.c
@@ -65,4 +65,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-27.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-27.c
index d640bcf74ba..2423f7b33ee 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-27.c
@@ -48,4 +48,4 @@ foo (char const *buf, size_t len)
 /* { dg-final { scan-assembler-not {vmv2r} } } */
 /* { dg-final { scan-assembler-not {vmv4r} } } */
 /* { dg-final { scan-assembler-not {vmv8r} } } */
-/* { dg-final { scan-assembler-not {csrr} { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not {csrr} } } */
-- 
2.43.0