On Tue, Sep 22, 2026 at 07:57:13PM +0200, Piotr Kubaj wrote:
> The big-endian vbpermq permute constant in _mm_movemask_ps lists the
> four sign-bit indices as 0x00 0x20 0x40 0x60, which puts element 0 in
> the most significant of the four result bits, while x86 (and the
> little-endian branch) put element 0 in bit 0. Reverse the order so
> big-endian returns the same mask as x86. _mm_movemask_pd and
> _mm_movemask_epi8 are already correct on both endians.
>
> The existing sse-movmskps-1.c test cannot catch this: its input has
> negative values in elements 0 and 3 only, and that mask reads the same
> in either bit order. Add a variant with an asymmetric input.
>
> Tested with GCC 14 on powerpc64-unknown-freebsd15.1 (POWER9,
> -mcpu=power8): {-1, 2, -3, 4} returned 10 instead of 5 before the fix.
>
> Assisted-by: Claude Fable 5.1
>
> gcc/ChangeLog:
>
> * config/rs6000/xmmintrin.h (_mm_movemask_ps): Fix big-endian
> permute constant.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/powerpc/sse-movmskps-2.c: New test.
This is ok for the master branch.
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: [email protected]
