> -----Original Message-----
> From: Alfie Richards <[email protected]>
> Sent: 17 September 2026 15:40
> To: [email protected]
> Cc: Alex Coplan <[email protected]>; Alice Carlotti
> <[email protected]>; Andrea Pinski
> <[email protected]>; Richard Biener <[email protected]>;
> Tamar Christina <[email protected]>; Zdenek Dvorak <[email protected]>;
> Robin Dapp <[email protected]>; Richard Sandiford
> <[email protected]>; Kyrylo Tkachov <[email protected]>;
> Alfie Richards <[email protected]>
> Subject: [PATCH v3 13/16] aarch64: Add fold_contiguous_load helper
> function.
>
> This is used in the refactor of aarch64 loads for implementing HSSR.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-acle-builtins.cc
> (gimple_folder::fold_contiguous_load): New function.
> * config/aarch64/aarch64-acle-builtins.h
> (gimple_folder::fold_contiguous_load): New function.
> * config/aarch64/aarch64-sve-builtins-base.cc:
> (svld1_impl::fold): Change to use fold_contiguous_load.
> (svldxf1_extend_impl::fold): Change to use fold_contiguous_load.
> * config/aarch64/aarch64-sve.md
> (aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PA
> RTIAL_I:mode>):
> Add else operand.
>
> Co-Authored-By: Alex Coplan <[email protected]>
Patch is OK.
Thanks,
Tamar
> ---
> gcc/config/aarch64/aarch64-acle-builtins.cc | 24 +++++++++++++++++++
> gcc/config/aarch64/aarch64-acle-builtins.h | 1 +
> .../aarch64/aarch64-sve-builtins-base.cc | 20 ++--------------
> gcc/config/aarch64/aarch64-sve.md | 1 +
> 4 files changed, 28 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64-acle-builtins.cc
> b/gcc/config/aarch64/aarch64-acle-builtins.cc
> index a37b4bc1198..a1c4965d2aa 100644
> --- a/gcc/config/aarch64/aarch64-acle-builtins.cc
> +++ b/gcc/config/aarch64/aarch64-acle-builtins.cc
> @@ -2850,6 +2850,30 @@ gimple_folder::fold_contiguous_base (gimple_seq
> &stmts, tree vectype)
> return base;
> }
>
> +/* Common code to fold a contiguous load intrinsic call into a gimple
> + call to IFN_CODE. */
> +gimple *
> +gimple_folder::fold_contiguous_load (internal_fn ifn_code)
> +{
> + if (vectors_per_tuple () != 1)
> + return nullptr;
> +
> + tree vectype = vector_type (0);
> +
> + /* Get the predicate and base pointer. */
> + gimple_seq stmts = NULL;
> + tree pred = convert_pred (stmts, vectype, 0);
> + tree base = fold_contiguous_base (stmts, vectype);
> + tree els = build_zero_cst (vectype);
> + gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);
> +
> + tree cookie = load_store_cookie (TREE_TYPE (vectype));
> + gcall *new_call = gimple_build_call_internal (ifn_code, 4,
> + base, cookie, pred, els);
> + gimple_call_set_lhs (new_call, lhs);
> + return new_call;
> +}
> +
> /* Return the alignment and TBAA argument to an internal load or store
> function like IFN_MASK_LOAD or IFN_MASK_STORE, given that it accesses
> memory elements of type TYPE. */
> diff --git a/gcc/config/aarch64/aarch64-acle-builtins.h
> b/gcc/config/aarch64/aarch64-acle-builtins.h
> index a9832c1689b..1bf798bfead 100644
> --- a/gcc/config/aarch64/aarch64-acle-builtins.h
> +++ b/gcc/config/aarch64/aarch64-acle-builtins.h
> @@ -650,6 +650,7 @@ public:
> tree force_vector (gimple_seq &, tree, tree);
> tree convert_pred (gimple_seq &, tree, unsigned int);
> tree fold_contiguous_base (gimple_seq &, tree);
> + gimple *fold_contiguous_load (internal_fn);
> tree load_store_cookie (tree);
>
> gcall *redirect_call (const function_instance &);
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> index 96697319fdc..39e7109abd8 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> @@ -1736,23 +1736,7 @@ public:
> gimple *
> fold (gimple_folder &f) const override
> {
> - if (f.vectors_per_tuple () != 1)
> - return nullptr;
> -
> - tree vectype = f.vector_type (0);
> -
> - /* Get the predicate and base pointer. */
> - gimple_seq stmts = NULL;
> - tree pred = f.convert_pred (stmts, vectype, 0);
> - tree base = f.fold_contiguous_base (stmts, vectype);
> - tree els = build_zero_cst (vectype);
> - gsi_insert_seq_before (f.gsi, stmts, GSI_SAME_STMT);
> -
> - tree cookie = f.load_store_cookie (TREE_TYPE (vectype));
> - gcall *new_call = gimple_build_call_internal (IFN_MASK_LOAD, 4,
> - base, cookie, pred, els);
> - gimple_call_set_lhs (new_call, f.lhs);
> - return new_call;
> + return f.fold_contiguous_load (IFN_MASK_LOAD);
> }
>
> rtx
> @@ -2140,7 +2124,7 @@ public:
>
> insn_code icode = code_for_aarch64_ldf1 (m_unspec, extend_rtx_code (),
> mode, e.memory_vector_mode ());
> - rtx res = e.use_contiguous_load_insn (icode);
> + rtx res = e.use_contiguous_load_insn (icode, true);
> /* See the block comment in aarch64-sve.md for details about the
> FFR handling. */
> emit_ldf1_ffr_update (get_last_insn ());
> diff --git a/gcc/config/aarch64/aarch64-sve.md
> b/gcc/config/aarch64/aarch64-sve.md
> index e7fe0b87978..fc53b212ac6 100644
> --- a/gcc/config/aarch64/aarch64-sve.md
> +++ b/gcc/config/aarch64/aarch64-sve.md
> @@ -1490,6 +1490,7 @@ (define_insn_and_rewrite
> "@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SV
> (unspec:SVE_PARTIAL_I
> [(match_operand:<SVE_PARTIAL_I:VPRED> 2 "register_operand"
> "Upl")
> (match_operand:SVE_PARTIAL_I 1
> "aarch64_sve_ld<fn>f1_operand" "Ut<fn>")
> + (match_operand:SVE_PARTIAL_I 4
> "aarch64_maskload_else_operand")
> (reg:VNx16BI FFRT_REGNUM)]
> SVE_LDFF1_LDNF1))]
> UNSPEC_PRED_X))]
> --
> 2.43.0
