This series corrects the ev6 pipeline description using timings from an
EV68AL, adds a pass that avoids a cross-cluster stall in some ev6
loops, and enables LRA by default on BWX Alpha targets.  The first three
patches do not depend on LRA, so the LRA patches come last.

Patches 1 and 2 change ev6.md to match measurements:

  - itof has a latency of 4, as Table 2-4 of the Compiler Writer's
    Guide says, not 3.  An itof result consumed directly by an ftoi
    costs 8 cycles on that edge, not 4.
  - The old note suggested modeling the cross-cluster delay by
    duplicating every EBOX reservation.  The hardware usually keeps a
    dependent consumer in its producer's cluster (an add chain costs
    1.008 cycles per link, not 2), so that would make the description
    worse.  The delay is only forced between the count/MVI unit (U0
    only) and the multiplier (U1 only), so patch 2 adds bypasses for
    just that.

Patch 3 adds the pass.  Which cluster an instruction issues to depends on
its position in the aligned octaword, so moving a loop body by one
instruction can put both ends of a dependence on the same side or on
opposite sides.  Two loops I looked at run at 4.00 cycles per iteration
with -mtune=ev6 and 3.00 with -mtune=ev5, and a single nop recovers the
cycle.  The pass inserts nops after the label of an ev6 loop when its
model predicts that this removes a split dependence on the critical path
without costing a fetch cycle.  -mno-cluster-align disables it.

On the 54 single-file C benchmarks in llvm-test-suite the pass changes the
code of 12.  Over the nine that can be timed to better than 5%, the
geomean is 0.9962 with a 95% CI of [0.9948, 0.9977]; lowercase is 3.3%
faster, huffbench 0.2% faster, and none regresses distinguishably.  The
gain on typical code is small.  The loops it targets run 25% faster.

Patches 4 and 5 are a resend of a patch I first posted on July 20:

  https://gcc.gnu.org/pipermail/gcc-patches/2026-July/724654.html

The input_operand fix is split out of it as patch 4, since it is a
separate change.  Patch 5 adds -mlra, which defaults to on for TARGET_BWX
and off otherwise, with -mno-lra as an escape hatch until reload is
removed.  Non-BWX stays on reload until PR 117185 is resolved.

The patch has not had a review.  I pinged it on August 3:

  https://gcc.gnu.org/pipermail/gcc-patches/2026-August/726192.html

and on July 20 I asked Vladimir Makarov and Peter Bergner for input in
PR 117185:

  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117185#c8

I also wrote to Vladimir privately on September 21.  He replied that he
would look into the issue and give feedback, but I have not heard
anything further, and there has been no reply from Peter.

Signed-off-by: Matt Turner <[email protected]>
---
Matt Turner (5):
      alpha: Correct the ev6 itof latency and model the itof to ftoi penalty
      alpha: Model the ev6 cross-cluster delay between MVI and multiply
      alpha: Add a cluster-aware loop placement pass for ev6
      alpha: Test lra_in_progress in input_operand
      alpha: add -mlra and enable LRA by default on BWX targets

 gcc/config/alpha/alpha.cc                        | 413 ++++++++++++++++++++++-
 gcc/config/alpha/alpha.opt                       |   8 +
 gcc/config/alpha/alpha.opt.urls                  |   5 +
 gcc/config/alpha/ev6.md                          |  34 +-
 gcc/config/alpha/predicates.md                   |   4 +-
 gcc/doc/invoke.texi                              |  18 +
 gcc/testsuite/gcc.target/alpha/cluster-align-2.c |  23 ++
 gcc/testsuite/gcc.target/alpha/cluster-align.c   |  27 ++
 8 files changed, 520 insertions(+), 12 deletions(-)
---
base-commit: 2104f1a937eb8c7a701fb7338bee9bfb5f72f902
change-id: 20261111-alpha-cluster-sched-72bd20a5cfa3

Best regards,
--  
Matt Turner <[email protected]>

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