On 02/10/13 15:17, Kyrill Tkachov wrote: > Hi all, > > The current ARM RTX costs code was written when most ARM implementations > had similar costs for the majority of operations, with just a small > number of exceptions. It was therefore possible to have some common > code that determined most of the costs with corrections for the special > cases. > > As the ARM architecture has evolved the costs of some operations has > started to change considerably, with the result that more and more code > is being duplicated. That's bad as it leads to missed cases and > therefore incorrect costs. It also makes it much harder to test all the > code paths effectively. > > With this patch we adopt a new approach: using one hunk of code to walk > the RTL and assign the costs, but using processor-specific cost > adjustments that are table based. Only the architectural variation has > to be factored into the code itself and that can all be done in-place. > Furthermore, this code can also be used to calculate the size costs as > well the performance costs, further reducing the amount of duplication. > The code can only be used for ARM and Thumb2 code generation -- a > separate RTX walker will be needed for thumb1, but it could share the > same cost tables. > > Converting all the existing target processors to using the new > infrastructure will take a little while, since there is a lot of > performance benchmarking and validation to do. So to start with we are > providing tables only for the newer cores -- for older cores we continue > to use the existing cost tables at present (though we hope to have them > all converted before 4.9 ships). In the mean time, you can experiment > with the new and old tables by specifying the (transitional options) > -mnew-generic-costs (for unconverted targets) or -mold-rtx-costs (for > converted targets). We do not expect the code generated to be identical > in all cases, but it should be fairly similar, particularly for the > older processors. > > This patch provides new costs for generic tuning and Cortex-A15, with tables > for other A-class cores coming soon, such as: > Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A12, Cortex-A53. > > The remainder will use the legacy tables for now. > > Unfortunately, we don't have timing data for some of the listed XScale > and Faraday parts -- if someone could step up with cost tables for those > cores that would be extremely helpful -- failing that we will switch > them at some point to use the most appropriate generic costs when we > retire the old code. > > > Bootstrapped on arm-linux-gnueabihf and regtested on arm-none-eabi. Looked at > the generated assembly for various code samples to make sure the output is > sane. > > Ok for trunk? > > Thanks, > Kyrill > > 2013-10-02 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Richard Earnshaw <richard.earns...@arm.com> > > * config/arm/aarch-common-protos.h (struct alu_cost_table): New. > (struct mult_cost_table): Likewise. > (struct mem_cost_table): Likewise. > (struct fp_cost_table): Likewise. > (struct vector_cost_table): Likewise. > (cpu_cost_table): Likewise. > * config/arm/arm.opt (mold-rts-costs): New option. > (mnew-generic-costs): Likewise. > * config/arm/arm.c (generic_extra_costs): New table. > (cortexa15_extra_costs): Likewise. > (arm_slowmul_tune): Use NULL as new costs. > (arm_fastmul_tune): Likewise. > (arm_strongarm_tune): Likewise. > (arm_xscale_tune): Likewise. > (arm_9e_tune): Likewise. > (arm_v6t2_tune): Likewise. > (arm_cortex_a5_tune): Likewise. > (arm_cortex_a9_tune): Likewise. > (arm_v6m_tune): Likewise. > (arm_fa726te_tune): Likewise. > (arm_cortex_a15_tune): Use cortex15_extra_costs. > (arm_cortex_tune): Use generict_extra_costs. > (shifter_op_p): New function. > (arm_unspec_cost): Likewise. > (LIBCALL_COST): Define. > (arm_new_rtx_costs): New function. > (arm_rtx_costs): Use arm_new_rtx_costs when core-specific > table is available. Use old costs otherwise unless mnew-generic-costs > is specified. > * config/arm/arm-protos.h (tune_params): Add insn_extra_cost field. > (cpu_cost_table): Declare. > > OK.
R.