On Wed, 24 Jun 2026, Michael Matz via Gcc wrote:
> > Due to register asm, hard register r18 is live across the division. > > And that's the bogosity. The register variable r18 can live in a pseudo > during that division, and _should_ live in a pseudo outside of the > specific setup/teardown sequences of the two inline asms. > > In normal situations the register allocator will then do its best to > allocate that pseudo to r18 again (and hence remove the copy insns), > whereas in _this_ situation it won't (the pseudo conflicts with r18), so > the copies remain, and everything will work out automatically leading to > exactly the situation that you'd like to create after the fact by > extending live range splitting. Great to finally hear this, fwiw. I tried to ask for saner register var implementation back in 2018 unsuccessfully: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87984 Alexander
