On 8/22/07, Andrew Pinski <[EMAIL PROTECTED]> wrote: > Which hardware (remember GCC is a generic compiler)? VMX/Altivec and > SPU actually does not have different instructions for bitwise > and/ior/xor for different vector types (it is all the same > instruction). I have ran into ICEs with even bitwise on vector > float/double on x86 also in the past which is the other reason why I > disabled them. Since this is an extension, it would be nice if it was > nicely defined extension which means disabling them for vector > float/double.
One more note, the "C/C++ Language extensions for the CBEA" specifications, says that the bitwise operators don't work on vector float/double but do work on the integer vector types. So the other reason why this change I did was to make us more conforming with that standard (yes I worked on that spec but I did not write that part). -- Pinski