Ross Ridge <[EMAIL PROTECTED]> wrote:
> GCC makes the problem is even worse if only SSE and not SSE 2 instructions
> are enabled. Since the integer bitwise instructions are only available
> with SSE 2, using casts instead of intrinsics causes GCC to expand the
> operation into a long series of instructions.
Andrew Pinski writes:
...
>Why did Intel split up these instructions in the first place, is it
>because they wanted to have a seperate vector units in some cases?
>I don't know and I don't care that much.
Well, if you would rather remain ingorant, I suppose there's little
point in discussing this with you. However, please don't try to pretend
that the vector extenstions are supposed to be generic when you use
justifications like it's how Altivec works, and it's compatible with
a proprietary "standard" called "C/C++ Language Extensions for Cell
Broadband Engine Architecture". If you're going to continue to use
justifications like this and ignore the performance implications of
your changes on IA-32, then you should accept the fact that the vector
extensions are not ment for platforms that you don't know and don't care
that much about.
Ross Ridge
