"Radu Hobincu" <radu.hobi...@arh.pub.ro> writes:
> Thanks for the reply. I scrolled a lot through the i386 md and c files. I
> notice that the i386 architecture has dedicated
> instructions for comparing values and ALU instructions only specify
> (clobber (reg:CC FLAGS_REG)). What I do not understand is how they specify
> the way ALU instructions affect the flags.
E.g.,
(define_insn "*sub<mode>_2"
[(set (reg FLAGS_REG)
(compare
(minus:SWI
(match_operand:SWI 1 "nonimmediate_operand" "0,0")
(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
(const_int 0)))
(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
(minus:SWI (match_dup 1) (match_dup 2)))]
"ix86_match_ccmode (insn, CCGOCmode)
&& ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
"sub{<imodesuffix>}\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(set_attr "mode" "<MODE>")])
> In order to set the flags, I am trying something like this:
>
> (define_expand "addsi3"
> [( parallel [(set (match_operand:SI 0 "register_operand" "")
> (plus:SI (match_operand:SI 1 "register_operand" "")
> (match_operand:SI 2 "nonmemory_operand" ""))
> )
> (set (reg:CC FLAGS_REG) (compare:SI (match_dup
> 1) (match_dup 2)))]
> )]
> ""
> "
> if(GET_CODE(operands[2])==CONST_INT && INTVAL(operands[2])==1){
> emit_insn(gen_inc(operands[0], operands[1]));
> DONE;
> }
> "
> )
That doesn't look right, unless your machine is rather odd. You want
something like the above: set the FLAGS_REG to the comparison of the
sum with zero.
> I am probably a bit confused about the compiler behavior since I am
> thinking more like in the way of machine execution. The compiler doesn't
> know the values of the operands at compile time, so it doesn't really set
> any flags in the condition register. How does it work then?
You describe to the compiler what value the flags register will hold
after the operation is complete, in terms of the operands.
Ian
