Hi All, From testing, I found out that the whole width of a MIPS integer/floating-point register is saved and restored around a call. This may hurt the performance.
Ex: fu@debian6:/disk/fu/dev/test$ cat add2.c void test2(float); float test(float a, float b) { test2(a*b); return a; } fu@debian6:/disk/fu/dev/test$ gcc -S -O2 add2.c -mips64r2 -mabi=n32 (# Or ) fu@debian6:/disk/fu/dev/test$ gcc -S -O2 add2.c -mips32r2 -mfp64 fu@debian6:/disk/fu/dev/test$ grep f0 add2.s mov.s $f0,$f12 <---- sdc1 $f0,24($sp) <---- ldc1 $f0,24($sp) <---- The 64-bit $f0 is saved and restored via sdc1 and ldc1. However, using lwc1 and swc1 should be ok and faster. From http://gcc.gnu.org/ml/gcc-patches/2001-02/msg01480.html, the patch defines HARD_REGNO_CALLER_SAVE_MODE to return proper mode for i386. For MIPS, we may have: Ex: #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ ((MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false) \ : (MODE)) Any feedback about adding HARD_REGNO_CALLER_SAVE_MODE to MIPS? Thanks! Regards, Chao-ying