On Tue, Jun 11, 2013 at 7:07 AM, shmeel gutl <shmeelg...@shmuelhome.mine.nu> wrote: > In the architecture that I am using, there is a big pipeline penalty for > read after write to the same memory location. Is it possible to tell the > difference between a possible memory conflict and a definite memory > conflict?
Not with existing API on the RTL level. But the RTL dependence checking code has "must" and "may" pieces that could be factored out. Richard.
