Paulo Matos schrieb:
I am convinced that what I am about to ask is not possible but I would like someone to confirm this.Can I define in an insn a register constraint that depends on another register value? So, for (set (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "register_operand" "r")) What I would like to represent is the fact that 0 and 1 are register pairs, so op0 is even and op1 is op0 + 1. I noticed that avr defines register pair constraints but only for specific registers. If you
On avr, modes > 1 byte always start in an even register, see avr_hard_regno_mode_ok.
have 64 registers that will give you 22 pairs. I could, of course, create all of these by hand by defining 23 classes and define a single constraint that matches these classes but I would like to know if there's another way.
What are you trying to achieve? In order so synthesize MOVW instructions after reload, see respective RTL peepholes.
Johann
