On 05/07/2015 09:24 AM, Richard Henderson wrote:
> I was wondering this morning about the possibility of a kind of constraint
> that
> would allow RA to generate pairs of registers via CONCAT. That is, the two
> hard registers within the CONCAT are collectively the double-word allocation,
> but need not be sequential like current multi-word allocations. A target
> using
> such a constraint is promising to handle the CONCAT either by splitting (and
> gen_lowpart et al), or print_operand letters (e.g. the m68k %R, for outputting
> the low part of a pair).
>
> With that, we get the best of both -- lower-subreg effectively happening in
> RA,
> and DImode arithmetic in SSE no subregs required.
I forgot one issue that lower-subreg also cures -- describing the lifetime of
the pair of registers. We wouldn't get that with a single bit saying that
CONCAT is ok.
E.g.
di100 = di101 + di102
split to
(flags, si200) = si201 + si202
si300 = si301 + si302 + carry(flags)
If we split prior to RA, we can see that si200 cannot overlap si301 or si302.
If we split after RA, we have to handle this ourselves in the backend, leading
to additional matching-constraint alternatives and/or early-clobbers.
We'd need a couple of bits: one saying that concat is ok, the other saying
whether all lows are consumed before all highs, when allocating a set of
CONCATs across all of the operands.
Or perhaps we don't need such a bit and we merely include "high inputs not
clobbered by low output" as part of the contract with RA.
r~
