David Edelsohn wrote:
> Why does AArch64 define PROMOTE_MODE as SImode? GCC ports for other
> RISC targets mostly seem to use a 64-bit mode. Maybe SImode is the
> correct definition based on the current GCC optimization
> infrastructure, but this seems like a change that should be applied to
> all 64 bit RISC targets.
The reason is that AArch64 supports both 32-bit registers, so when using
char/short
you want 32-bit operations. There is an issue in that WORD_REGISTER_OPERATIONS
isn't set on AArch64, but it should be. Maybe that requires some cleanups and
ensure it
correctly interacts with PROMOTE_MODE. There are way too many confusing target
defines like this and no general mechanism that just works like you'd expect.
Promoting
to an orthogonal set of registers is not something particularly unusual, so
it's something
GCC should support well by default...
Wilco
