Matthew Fortune wrote: > If however the address of my_mem is lowered after IRA i.e. when validating > constraints in LRA then IRA has nothing to do as the address is just a > symbol_ref. When LRA resolves the constraint for the address it introduces > a register for the output memory address but does not seem to acknowledge > any conflict with the output register (bar) it can therefore end up > using the same register for the output memory address as the output registe= > r. > This leads to the obvious problem if the ASM updates %1 before %0 as it will > corrupt the address. > > This can of course be worked around by making (bar) an early clobber or an > in/out but this does seem unnecessary. > > The question is... Should LRA recognise a conflict between the registers > involved in the address portion of an output memory operand and any output > register operands or is this a case where you strictly have to use early > clobber.
Usually, the constraints are interpreted under the assumption that inputs and output are used atomically, as if by a single target instruction. If you consider an instruction that both updates memory and sets a register, then most architectures will indeed allow for the output register to be the same as one of the address registers for the memory operand, and therefore GCC should allow this allocation. In those cases where this is not true, e.g. because your inline asm does in fact use multiple instructions which set the two outputs at different times, then you should indeed use the earlyclobber flag -- that is exactly what this flag is intended for. The GCC documentation of the earlyclobber flag says: Means (in a particular alternative) that this operand is an earlyclobber operand, which is written before the instruction is finished using the input operands. Therefore, this operand may not lie in a register that is read by the instruction or as part of any memory address. Note in particular "... as part of any memory address." Bye, Ulrich -- Dr. Ulrich Weigand GNU/Linux compilers and toolchain ulrich.weig...@de.ibm.com
