Hi Ulrich. Thanks for your detailed reply. >> > Therefore again my question, what is the actual goal >> > you want to achieve? I'm still not sure I understand >> > that ...
>> I would like to know what is required to implement >> “-m32” in the S/390 target. I realize that z/Arch >> doesn’t have a specific AM32, but I don’t need a >> specific AM32. What would actually happen if you >> coded a “-m32” and then ran it in an AM64 >> environment? > That depends on what that would actually do. I'm still not > quite sure what the actual requirements are. > Is this about supporting a 4GB address space instead > of a 2GB space? Yes, correct. > (I'm not aware of that being used anywhere currently.) I’m about to use it. I just need to get past the problem with negative indexes being used, and I need your help. > Is it about supporting a 32-bit pointer type in an > otherwise AM64 environment? (This is already used > by the TPF target, but the 32-bit pointer will still > refer to a 2GB address space.) Yes, all pointers will be 32-bit – a normal 32-bit system. > Is it something else? Nope, you got it. > In either case, what is the actual benefit of that mode? > (I.e. what benefit would justify the effort to implement it?) The “legacy” environment of z/Linux etc would be 32-bit instead of 31-bit. IBM’s reputation will be restored. IBM will have the best architecture on the planet. Better than x64 because no mode switch is required shifting between 32-bit and 64-bit applications. All run as AM64 = AM-infinity. >> >> Also, I just realized – if GCC is using LA for maths >> >> for 32-bit registers, then values will be limited to >> >> 2 GiB instead of 4 GiB for unsigned, but that is not >> >> the case. > >> > That's why GCC makes sure to only use the instruction >> > when a 31-bit addition is wanted. This can be the >> > case either when GCC can prove that the involved >> > operands are pointer values (which are by definition >> > restricted to 31-bit values in -m31 mode) > >> The compiler doesn’t create a restriction there. >> It just generates a simple LA and it works >> differently depending on whether it is AM24/31/64. > It is the other way around. The compiler knows > exactly how the LA instruction behaves in hardware, > and will use the instruction whenever that behavior > matches the semantics of (a part of) the program. > Since the behavior of the instruction differs based > on the addressing mode, the compiler will have to > know which mode the executable will be running in. The i370 port produces code that works in AM24, AM31, AM32 and AM64 (except for negative indexes). I’m surprised the s390 port doesn’t too. As far as I can remember from using IBM C, it supports execution in any AMODE too. > Currently, the -m31/-m64 switch basically changes several > things (at the same time) > - the assumption on which AM the executable will run in > - the (used) size of a general-purpose register > - the (default) size of a pointer type > - ABI (function calling convention) details > In theory, it would be possible to split this apart > into distinct features, so that it would be possible > to implement a mode where you can have code that uses > 32-bit pointers but is running in AM64 (which would > then support a 4 GB address space). > Is this what you mean by an "-m32" mode? Yes, correct. > Basically, this would involve looking at all uses of > the TARGET_64BIT macro in the back-end and determine > which of them actually depend on which of the above > features, and disentangle it accordingly. > I guess that would be possible, but it requires a > nontrivial effort. I’d like to approach the problem from the other direction – what modifications are required to be made to “-m31” so that it does “-m32” instead? I’m happy to simply retire “-m31”, but I don’t care if both exist. If “-m31” is retired, and made an alias for “-m32”, my guess is that 20 lines of code need to be changed. The most important thing is to stop generating negative indexes. ie if you have “char *p” and you go p[-1] I don’t want 0xFFFFFFFF generated as an index. I instead want a subtraction done. I was under the impression that this was governed by the Pmode – whether it was set to DImode or SImode. But I tried forcing Pmode to DImode, even for “–m31”, but it gave an internal error, which I showed you already. What am I missing? Thanks. Paul.
