DJ Delorie wrote: if you assume separate symbols, you've avoided the whole
issue by defaulting to heavier symbols - one per part (74ALS00FN), not one per type (nand gate). I think with custom chips (cpus, sensors, etc) coming in multiple packages and being more readily available, we'll be seeing this type of problem more often in the near future.
SDB wrote:
I don't think gEDA supports this now, nor do I think it should support it in the future.
DJ Delorie wrote:
I may argue this point in the future, of course ;-) CadStar used that sort of scheme, where you put in "nand gate" at first, and later decide where it comes from. In my case, with op amps and comparators, it would come in handy, since they come in so many different packages.
I think this might be helped by the idea of "stackable symbols" that are linked somehow. An ultralight symbol plus a linked-on heavier section plus any "hand edit" attribs added to the schematic via gattrib or gschem. Those could all appear aas one to gnetlist. The refdes attribute links them.
Does linking two symbols so they behave as one sound fesible? Have I forgotten something? Doesn't seem too remote from the multiple slotted sections plus power pins section style of doing a symbol, where the refdes is all that links them.
John G _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
