I'm working on a board that has an obvious DRC violation, but DRC is missing it. I try to reproduce it as a test case, and DRC works normally. Anyone else see this?
http://www.delorie.com/pcb/baddrc.html http://www.delorie.com/pcb/baddrc.pcb In this snapshot, the distance between the big via and the purple trace is 6 mils. The rules are set to 8/8. DRC says there's no violations. _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
