On Fri, 2002-11-22 at 20:30, Frank Miles wrote: > There are a few essentials for me, at least: > (1) the netlist, which is generated from the schematic, must always be > able to sync up with the PCB via DRC; > (2) when design changes occur (for this implementation or the next generation > hardware), re-use of the existing layout should be maximized.
I'm not sure if this is what you mean, but here is another approach to the "problem" of back-annotation that *might* work: Any changes in gschem will be transferred to the netlist in the pcb program by "a click of a button". So if you want to swop gates, or flip pin allocations on a bus driver (two very common but non-trivial cases), then it is a matter of doing the changes in gschem, and say GO. To work out in practice, this has to work pretty automatically (not too hard to do) but also rapidly. This *might* need a sort of diff/patch mechanism in the pcb package, I'm not sure. > I distrust back-annotation for anything but the simplest stuff (e.g. > reference designators). That is probably a very good point. A smooth system for forward annotation is probably even better, because you would do the changes in a tool meant for such things. Egil -- Email: [EMAIL PROTECTED] Voice/videophone: +47 22523641 Voice: +47 92022780 Fax: +47 22525899 Mail: Egil Kvaleberg, Husebybakken 14A, 0379 Oslo, Norway Home: http://www.kvaleberg.com/
