DJ Delorie wrote: >> The phrase "doesn't scale" comes to mind. > > For memory I manually re-route connections in gschem after figuring > out what makes sense in pcb; then load the new netlist and let pcb > complain about whatever needs moving to make it so.
My solution was to run through a bus, even where it wasn't needed for readability. Then the pin swapping is easily accomplished using net names on the bus rippers. For memories, this is actually a pretty good solution. > In my examples, I've been using sub-slotting for my pin maps. That > syntax isn't properly parseable, but perhaps something like this would > be... Example 7410: > > ([1,2,13],12),([3,4,5],6),([9,10,11],8) Yeah, I obviously didn't think through for the interaction between slots, pin swapping, and share power pins. -dave _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
