> I think you'd be fine without the stubs going to the header. Even with > the stubs your SDRAM will probably work but there will be terrible EMI.
This is a proof-of-concept board, so EMI isn't an issue (yet). Certainly, adding the analyzer's probes will add EMI all over the place too. > I chased down an EMI problem on a board with ONE stub at 125MHz (due to > leaving a clock testpoint enabled). You have 20+ stubs. Series resistors on the back (stub) side, maybe? Near the via? > Ideally you'd put the LA connector in the middle of the bus. Just pick > a higher density connector. AMP MICTOR connectors are a popular choice. The problem is, the connector is somewhat pre-defined for me - I'm using old hard drive cables as the LA's connector is a standard 2x20 ribbon cable connector. And, my software doesn't let me rearrange the signals in a "bus" so I had to bring them out in the right order. > > I'm thinking I have enough space to put in some series terminator > > packs (8x 0402 SMT) but where and how big? > > Does the FPGA you're using have controllable drive strength? Hmmm... yes, it does - it has both slew rate control and drive current control. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
