On Thu, 09 Jul 2009 18:22:07 +0200, igor2 wrote: > This means the user can swap whatever he wants on the PCB > and his schematics becomea haystack with red lines, then he can go and > clean it up when he finished swapping pins on the PCB.
Rats nests in the schematic! The topological auto router may be handy to resolve the mess ;-) ---<(kaimartin)>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
