On 11/06/2010 10:22 PM, DJ Delorie wrote:
   begin
       cs = address[23:20];

       bclk1;
       a = address;
       d_val = data;
       rd = 1;
       mcu_state = 1;
       fork
         mcu_cson (address);
         mcu_wron (address);
         mcu_wdon (address);
         mcu_cswwait (address);
       join
       mcu_state = 2;


I don't think you want two different assignments to the same reg, mcu_state in 
the same begin end block.
A begin end block is not procedural, not top to bottom, all at once.

John


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