On Wednesday 05 November 2003 22:41, Bill Cox wrote: > These seem like good ideas. �The most common element seems to be a > schematic generator. �Then, to generate a schematic from SPICE, all we'd > need is a SPICE reader, which isn't too difficult.
If spice is no problem, then maybe also spectre is no problem? > > I need to be careful not to accidentally re-implement trade-secret ideas > I learned from working at previous companies. �It would help a lot if > you or anyone on this group could suggest some placement algorithms for > schematics. �The routing is just plain old a-* maze routing, which is > well known in the industry. As a mixed-signal designer I know that we are talking about two worlds here with different needs: The analog and the digital. A spice netlist basically don't care in which regime it works, it just connect transistors. In the digital world, the structures are placeable with high degree of visual acceptance of the human eye. In analog we are talking about "the structure is the data" as in the interconnection in current mirrors, differential amplifiers with and without cascodes etc. It is almost impossible to have the computer understand this. My argument would then, for the analog world, be to assign some fixed points and let a graph algorithm with the use of positive and negative forces. The fixed points are inputs left, outputs right, positive power to the top, negative power to the bottom and ground in the middle, if there is no negative power then ground is bottom. The user must be able to define global names for powers. The graph algo then assign weights to interconnections: direct connections are tied closely, the nodes with most connections are propably power and ground or bias and are loosely tied in the first pass. When weight has been assigned, P and N channel transistors are assigned separating force in order to move them away from each other in north - south direction, nodes further away from an input or an output are given a force to move them in east - west direction. In the end you will have something that maybe doesn't satisfy 100%, but it is a good base for manual reordering which is then saved together with a flag that this page has already been routed so that the software doesn't rip up work already done when reading in new versions of the spice netlist. (very typical after an engineering cell change in the gate level netlist after somebody discovered a timing violation in the layout) And even more typical for PCB where you discover that you need an extra resistor on your breadboard. -- Svenn
