On Tue, 2005-11-01 at 20:35 -0500, Bob Paddock wrote: > On Tuesday 01 November 2005 05:32 pm, Dan McMahill wrote: > > > In the project I am currently working on, I am trying to do most > > > of the work in a DSP rather than the FPGA so users can make more > > > modifications without having to install non free sofware. > > > > Out of curiosity, which DSP chip can be programmed with free (open > > source or otherwise) software? > > The Microchip dsPIC parts. Their compiler is a port of GCC. > > > btw, I think altera figures that if you can't buy their development > > tools without flinching then > > Lattice has some support under Linux but I have not used it, just the Windows > version at work. I have found the Lattice parts and tools to be cheaper than > Xilinx or Altera.
Harold Skank here. I'm using Lattice, ispLEVER, version 5.0 under RedHat ES, version 4. I became attracted to Lattice by their aggressive pricing, and for the most part I came out OK. There were some twists however. Particularly, I wanted to program the chips in Verilog, permitting me to use the gEDA, Icarus-Verilog package, but I couldn't get their package to accept the Icarus EDIF output. Turned out that they didn't support that (something to do with accessing their libraries), but they did provide me with a free copy of a student license that permitted me to submit the Icarus-Verilog package to either their Mentor Graphics or their other (whatever it was) compiler to generate a usable EDIF output. That output, in turn ran under their Linux version of ispLEVER to generate the required chip code. I haven't actually programmed a chip yet, so I can't offer full assurance that the approach works, but it looks OK to now. I should also add that I first loaded the Lattice package using Fedora and only switched to RedHat when I though I ran into trouble. It appears that I never needed to load RedHat. > > There is also Actel that never seems to get much press. You can now get a > real ARM core in their parts, without the hideous fees. >
