Larry Doolittle wrote:
Unlike previous generations of Xilinx chips, I couldn't find any recommendations/app notes for decoupling of the Spartan3. So I don't know how many decoupling caps to attempt, beyond the obvious "one per power pin".
Xilinx has an app note on their web site (XAPP623) that addresses the decoupling issue for any chip, not a specific type or package. It's written for engineers and can be a long and dry read, but all of the important information is in there. Take a look at
http://direct.xilinx.com/bvdocs/appnotes/xapp623.pdf HTH, Greg Bengeult
